Sectionalized Dummy Gate Lines for SRAM FinFET Short Prevention
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Solution Overview
Problem
Conventional SRAM FinFET memory devices experience undesirable electrical shorts due to metal contact holes near dummy edge cells being larger than those in dense areas, leading to current leakage through dummy gates instead of the intended electrical path, which hampers device performance.
Innovation Solution
The design introduces sectionalized dummy gate lines and gate slots to create a gate-end spacing between metal contacts, preventing electrical shorts by ensuring the dummy gates are spaced apart effectively during the patterning of the gate layer, thereby maintaining the intended electrical path for current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If metal contact holes are enlarged near dummy edge cells, then ease of manufacture is improved, but electrical shorts occur between metal contacts through dummy gates
Solution Approach 1:
The dummy gate line is divided into multiple separate dummy gates by introducing gate slots, transforming a continuous conductive path into segmented isolated structures that prevent electrical shorts between metal contacts
Solution Approach 2:
Gate slots are introduced to extract or remove portions of the dummy gate line, creating gaps that break the electrical continuity and prevent current leakage paths between adjacent metal contacts
2Ease of manufacture
If dummy gate lines are continuous, then manufacturing is simplified, but current leakage occurs through the dummy gates
Solution Approach 1:
The continuous dummy gate line is segmented into discrete dummy gates separated by gate slots, eliminating the continuous conductive path that causes current leakage while maintaining manufacturability
Solution Approach 2:
Gate slots are used to extract and remove conductive material from the dummy gate line, breaking the electrical continuity and preventing current leakage paths
3Quantity of substance
If metal contacts are positioned close to dummy gates, then device density is improved, but electrical shorts occur
Solution Approach 1:
By segmenting the dummy gate line into separate gates with gate slots, metal contacts can be positioned closer to the dummy gate structures without creating direct electrical contact, thus improving density while maintaining isolation
Solution Approach 2:
Gate slots are strategically positioned to extract conductive material between metal contacts and dummy gates, enabling closer spacing while preventing electrical shorts
Data Source
AI summary
Semiconductor devices and method of manufacturing such semiconductor devices are provided for improved FinFET memory cells to avoid electric short often happened between metal contacts of a bit cell, where the meal contacts are positioned next to a dummy gate of a neighboring dummy edge cell. In one embodiment, during the patterning of a gate layer on a substrate surface, an improved gate slot pattern is used to extend the lengths of one or more gate slots adjacent bit lines so as to pattern and sectionalize a dummy gate line disposed next to metal contacts of an active memory cell. In another embodiment, during the patterning of gate lines, the distances between one or more dummy gates lines disposed adjacent an active memory cell are adjusted such that their locations within dummy edge cells are shifted in position to be away from metal contacts of the active memory cell.