Sectioned Clock Mesh Layout for Low-Skew, Lower-Power Distribution
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Solution Overview
Problem
Traditional clock distribution networks in VLSI chips face challenges in managing On-Chip Variation (OCV), clock skew, short-circuit power consumption, and peak power consumption simultaneously, leading to increased power consumption and reduced chip lifespan.
Innovation Solution
A sectioned mesh structure is introduced, where interconnected wires within sections are shorted together but not between sections, with repeater drivers in each section repowering the clock signal and acting as barriers to load imbalances, reducing power consumption and peak power by controlling global skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a traditional mesh structure with all leaf-level clock drivers connected together is used, then local skew and OCV are reduced, but short-circuit power consumption increases drastically
Solution Approach 1:
The mesh structure is divided into multiple independent sections, where drivers within each section remain connected to average out local skew, but connections between sections are eliminated. This segmentation prevents short-circuit current from propagating across the entire mesh while maintaining local skew benefits within each section.
2Reliability
If more individual clock drivers are added to maintain correct electronic properties under large loading, then clock signal integrity is maintained, but short-circuit current increases
Solution Approach 1:
By segmenting the mesh into sections with limited driver connections, each section handles a manageable load with fewer drivers. The repeater buffers at section boundaries ensure clock signal integrity is maintained across sections without requiring excessive drivers that would increase short-circuit current.
3Speed
If a tighter global skew is achieved to increase clock rate, then performance improves, but peak power consumption increases
Solution Approach 1:
The mesh is divided into sections that can operate with relaxed global skew requirements. Repeater buffers at section boundaries allow each section to maintain tight local skew for high performance while the overall system tolerates larger global skew variations, reducing peak power consumption.
4Manufacturing precision
If leaf-level clock drivers are shorted together in a traditional mesh, then local skew is reduced, but the structure cannot handle large loading without increasing driver count and power consumption
Solution Approach 1:
The mesh is divided into multiple sections, each handling a subset of the total load. This segmentation allows each section to maintain tight local skew with a manageable number of drivers, avoiding the need for a large number of drivers across the entire mesh structure.
Solution Approach 2:
Repeater buffers are introduced at section boundaries to mediate clock signal transmission between sections. These repeaters enable the mesh to handle large loading conditions without requiring a proportional increase in driver count, as the repeaters amplify and regenerate signals rather than requiring additional drivers at every node.
Data Source
AI summary
A sectioned mesh which includes multiple sections to distribute a clock signal to logic gates. Each section includes interconnected wires operable to deliver the clock signal to the logic gates. The interconnected wires in a same section are shorted together and the interconnected wires in different sections are not shorted. The sectioned mesh also includes clock input structure connecting to one or more contact points in an input section of the sectioned mesh. The sectioned mesh also includes multiple groups of repeater drivers to repower the clock signal. Different groups are in different sections, and each group in a respective section receives the clock signal from a neighboring section.