Secure Boot Circuit ECC Digest Verification
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Solution Overview
Problem
Current secure booting methods for electronic devices, such as those in the automotive industry, face challenges in achieving fast and secure boot times due to the need to verify large memory contents, which can take around 10 to 20 seconds, and require a more efficient way to authenticate memory contents before use.
Innovation Solution
A method and system that utilize an error correction code (ECC) as a compressed representation of memory content, where the ECC is cryptographically hashed and compared to a reference digest to verify the integrity of the memory, allowing for a significantly faster boot sequence by reducing the data to be verified, potentially completing in 1.5 to 0.15 milliseconds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complete memory content is verified using traditional cryptographic hashing, then data integrity is ensured, but boot time becomes excessively long (10-20 seconds)
Solution Approach 1:
The patent extracts only the error correction code (ECC) from the complete memory content for verification purposes. Instead of hashing the entire memory content, the system hashes only the ECC portion, which is a small fraction of the total data. This extraction principle reduces the verification data volume significantly while maintaining security, as the ECC inherently represents the integrity state of the entire memory content.
Solution Approach 2:
The patent segments the memory verification process into two distinct phases: (1) ECC generation phase where error correction codes are created and stored alongside memory content, and (2) ECC verification phase where only the ECC portion is hashed and compared. This segmentation allows the system to verify memory integrity without processing the complete memory content, thereby reducing boot time while maintaining reliability.
2Productivity
If error correction code is used as compressed representation, then verification speed increases significantly, but system complexity increases due to additional ECC generation and storage requirements
Solution Approach 1:
The patent implements self-service by generating the error correction code automatically as part of the memory content storage process. The ECC is created using standard error correction algorithms and stored alongside the memory content without requiring separate manual intervention. This self-generating approach simplifies the overall system architecture while enabling fast verification, as the ECC is readily available when needed without adding complex external verification infrastructure.
Data Source
AI summary
A method to secure boot an electronic device is disclosed according to some embodiments. The method includes receiving a request to initiate a boot sequence using memory content stored in a non-volatile memory circuit. A secure boot circuit receives verification data from the non-volatile memory circuit indicating the memory content. The verification data includes an error correction code for the memory content without including all of the memory content. A cryptographic hashing operation is performed to the error correction code in the secure boot circuit to obtain a digest of the error correction code. The digest is compared with a pre-stored reference digest to generate a verification signal. The verification signal is provided to the electronic device indicating whether the boot sequence passes the verification.