Secure Boot Register Comparison for Fault Injection Resistance
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Solution Overview
Problem
Conventional secure boot processes for IoT devices are vulnerable to fault injection attacks, which can cause bits in memory to flip, leading to skipped or modified secure check operations, compromising the integrity of the boot process.
Innovation Solution
The method involves writing pre-determined values in two registers of a System-on-Chip (SoC), one by hardware and one by software, and comparing these values during the secure boot process to detect any discrepancies that may indicate a fault injection attack, thereby ensuring the integrity of the boot operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional secure boot process is used, then the boot operation is simple and fast, but it is vulnerable to fault injection attacks that can flip bits in memory
Solution Approach 1:
The patent applies preliminary action by pre-writing identical predetermined values to both the first register (via software) and the second register (via hardware) before the secure boot process. This pre-synchronization of values creates a baseline for later comparison, allowing the system to detect any unauthorized modifications that occur during boot without adding complex real-time protection mechanisms.
Solution Approach 2:
The patent implements feedback by comparing the values in the first register (written by software) with the values in the second register (written by hardware) after the secure boot process. This comparison provides feedback on whether the boot process was compromised by fault injection attacks, enabling the system to detect bit flips and prevent unauthorized execution.
2Reliability
If fault injection attack resistance is enhanced by multiple checks, then security is improved, but the secure boot process takes longer
Solution Approach 1:
By pre-writing the predetermined values to both registers before the secure boot process, the patent eliminates the need for complex real-time verification during boot. The comparison operation is simple and fast, requiring minimal additional time while providing robust security verification.
3Measurement precision
If hardware-based pre-written values are used for comparison, then detection accuracy is improved, but the device complexity increases
Solution Approach 1:
The patent segments the secure boot verification process into two independent parts: a first register written by software and a second register written by hardware. This segmentation allows each register to be optimized for its specific function while maintaining overall system simplicity. The separation of concerns enables accurate attack detection without requiring a completely redesigned complex verification system.
Data Source
AI summary
A method for resisting fault injection attacks during secure boot is provided. The method may include: performing a secure check on a System-on-Chip (SoC), wherein one or more pre-determined values are written on one or more bits of a first register of the SoC during the secure check; reading one or more corresponding bits of a second register of the SoC; and comparing the values of the one or more bits of the second register with the values of the one or more corresponding bits of the first register. In response to a comparison result that the values of the one or more bits of the second register are the same as the values of the one or more corresponding bits of the first register, the SoC is booted.