Secure Boot Chain Using Shared Secrets for Faster Firmware Verification

The secure booting process is segmented into multiple stages with different verification mechanisms. Stage 1 uses symmetric key verification for fast booting, while Stage 2 uses public key verification for enhanced security. This segmentation allows the system to balance speed and security by applying appropriate verification methods at different booting stages.

Public key verification is performed in advance during device initialization or firmware update, and the verification results are cached. During actual booting, the cached results are used to speed up the process, eliminating the need for repeated computationally intensive public key operations.

The patent uses software-based cryptographic algorithms that replicate the functionality of hardware accelerators through efficient software implementation. By optimizing the software cryptographic library and using lookup tables for common operations, the system achieves hardware-like performance without adding physical hardware components.

The system dynamically adjusts verification parameters such as hash algorithm selection and verification depth based on device capabilities and security requirements. This allows the same device to operate in different performance modes, achieving fast booting on resource-constrained devices without requiring hardware accelerators.

The verification process is segmented into critical path and non-critical path operations. Only essential verification steps are performed during booting, while secondary verifications are deferred or performed asynchronously, reducing the time impact on the booting process.

The system performs partial verification by checking only critical components first (such as boot loader signature) and skipping verification of less critical components if time constraints are met. This partial action approach ensures security for essential elements while accepting reduced verification coverage to maintain fast booting.