Secure Branch Prediction Circuit with Task-Isolated History
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Solution Overview
Problem
Existing branch prediction technologies in IoT devices are vulnerable to malicious attacks, leading to potential leaks of confidential information and performance degradation due to shared branch status histories among tasks.
Innovation Solution
Assign each task a unique task identification and design the pattern history table to be task-independent, ensuring that different tasks cannot access each other's branch status history, thereby preventing branch prediction attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a branch predictor is used to hide waiting time and improve processor performance, then productivity is improved, but security deteriorates due to vulnerability to branch side-channel attacks
Solution Approach 1:
The branch predictor is segmented into task-independent components. Each task has its own isolated branch history buffer and pattern history table entries, preventing cross-task information leakage while maintaining prediction accuracy within each task. This segmentation resolves the contradiction by allowing performance optimization through branch prediction while eliminating security vulnerabilities from shared state.
Solution Approach 2:
A task identification register acts as an intermediary between the branch prediction mechanism and the pattern history table. Before accessing PHT entries, the system verifies task identification to ensure that only the current task can access its own branch history, preventing unauthorized access to other tasks' prediction data while maintaining efficient prediction for legitimate accesses.
2Productivity
If branch status history is shared among tasks to improve prediction accuracy, then productivity is improved, but reliability deteriorates due to attack vulnerabilities
Solution Approach 1:
The branch history buffer is divided into task-specific segments. Each task maintains its own separate branch history entries rather than sharing a common buffer, ensuring that prediction accuracy is maintained for each task without exposing other tasks' control flow information that could be exploited for attacks.
Solution Approach 2:
The pattern history table implements local quality by having task-specific validation rules. Each PHT entry is associated with a specific task identification, and access is granted only when the current task matches the expected task ID, providing localized security protection while maintaining global prediction functionality.
3Object-affected harmful factors
If task-independent pattern history table is implemented to prevent attacks, then security is improved, but device complexity increases
Solution Approach 1:
The branch prediction circuit performs self-validation by automatically checking task identification against stored task IDs in the pattern history table before accessing prediction data. This self-service mechanism eliminates the need for external security management hardware, maintaining simplicity while ensuring security through built-in task verification.
Solution Approach 2:
The security verification function is extracted as a separate task identification comparison stage before the main prediction logic. By isolating the security check from the prediction computation, the design maintains clean separation of concerns, reducing overall system complexity while ensuring security requirements are met.
Data Source
AI summary
A processor with secure branch prediction function includes a counter, a user core circuit and a secure branch prediction circuit. The counter is configured to generate a plurality of task identifications, wherein the task identifications include a current task identification and a previous branch task identification. The user core circuit is configured to execute an operating system, and request the operating system to assign the current task identification to a current task while the current task is created. The secure branch prediction circuit is configured to compare the current task identification with the previous branch task identification to generate a comparison result while the current task performs branch prediction of a branch instruction, and output a jump prediction message or a non-jump prediction message based on the comparison result.


