Secure Computing Control Apparatus for Data Packet Processing

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Solution Overview

Problem

Existing secure computing systems face efficiency challenges due to the high resource consumption of security algorithms, particularly in multi-stage processing, which affects the overall processing capability of communication systems.

Innovation Solution

A secure computing control method and apparatus that offloads data packet processing from the processor to hardware, utilizing a secure computing control apparatus connected to a processor and memory, which acquires data, selects appropriate security algorithms, performs secure computing, and transmits results, optimizing resource allocation and processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If security algorithms perform complex data processing operations, then security standards are achieved, but system resource consumption increases and processing capability is affected

Engineering Contradiction:
Improvesecurity standard achievementVSAvoidprocessing capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the data processing workflow into multiple stages, with different security algorithms applied at different stages. This allows the system to achieve comprehensive security coverage while optimizing resource allocation at each stage, preventing any single algorithm from consuming excessive resources.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts algorithm parameters and selects different algorithms based on data characteristics and security requirements. This enables the system to achieve necessary security standards while minimizing resource consumption by not applying maximum security measures uniformly to all data.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple security algorithms are applied in multi-stage processing, then security coverage is improved, but processing time increases

Engineering Contradiction:
Improvesecurity coverageVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary analysis of data characteristics before applying security algorithms, and applies lighter algorithms in early stages when possible. This preliminary assessment allows the system to achieve adequate security coverage while avoiding unnecessary time-consuming operations on data that don't require intensive processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a continuous multi-stage processing pipeline where security algorithms operate continuously on data streams. This continuous action approach maintains security coverage across all stages while optimizing throughput by keeping the processing pipeline full and avoiding idle time between stages.

Inventive Principle:
Principle #20Continuity of useful action

3Ease of operation

If processor handles all data packet processing, then control flexibility is maintained, but processing efficiency decreases

Engineering Contradiction:
Improvecontrol flexibilityVSAvoidprocessing efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the intensive data processing operations from the processor and implements them in hardware or firmware. This extraction allows the processor to maintain control flexibility and system management functions while dedicated hardware handles the computationally intensive security processing, significantly improving overall processing efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12223068B2Secure computing control method, data packet processing method and device and system thereof
Publication Date: 2025.02.11 ZTE CORP
  • US12223068B2 patent drawing
  • US12223068B2 patent drawing
  • US12223068B2 patent drawing

AI summary

A secure computing control method, a data packet processing method and device, and a system thereof are disclosed. The secure computing method may include: receiving a first data packet message for secure computing from a processor, the first data packet message including data packet information and secure computing configuration information corresponding to the data packet information; acquiring corresponding first data packet data from a memory according to the data packet information of the first data packet message; selecting a corresponding security algorithm according to the secure computing configuration information corresponding to the first data packet message; performing secure computing on the first data packet data by the selected security algorithm to generate secure computed second data packet data and a second data packet message corresponding to the second data packet data; transmitting the second data packet data to the memory; and transmitting the second data packet message to the processor.