Hardware Secure Element Parameter Check Module

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Solution Overview

Problem

Current secure processing systems in automotive applications face challenges in efficiently communicating between non-secure and secure processing units, particularly in ensuring data integrity and error handling, which can impact latency and robustness in security-critical functions.

Innovation Solution

A hardware secure element with a processing unit, a receiver circuit, and a parameter check module that utilizes look-up tables and zero-value, maximum value, address alignment, and memory check circuits to verify parameter validity, ensuring secure data processing and communication between non-secure and secure processing units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a secure element is isolated from the non-secure processing unit, then security is improved, but communication efficiency and latency are worsened

Engineering Contradiction:
ImprovesecurityVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a message handler module as an intermediary component that facilitates communication between the isolated secure processing unit and non-secure processing unit. This message handler acts as a mediator that receives messages from the non-secure unit, processes them through the secure unit, and returns results, thereby maintaining security isolation while enabling efficient communication without requiring direct access between the two units.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If parameter validation is performed in software, then flexibility is improved, but processing speed and latency are worsened

Engineering Contradiction:
ImproveflexibilityVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent segments the parameter validation functionality into dedicated hardware circuits for specific validation types (zero-value check circuit, maximum value check circuit, address alignment check circuit, memory check circuit). Each circuit handles a specific aspect of parameter validation in hardware, providing fast validation while maintaining flexibility through configurable check selection based on message type and parameter index.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses look-up tables to store configuration data that defines which validation checks should be performed for different parameter types and message contexts. By changing parameters (configuration data in look-up tables), the system can dynamically adjust validation behavior without hardcoding specific validation logic, thus maintaining flexibility while achieving hardware-speed validation.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If comprehensive parameter checking is implemented, then data integrity is improved, but device complexity is worsened

Engineering Contradiction:
Improvedata integrityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal parameter checking architecture where a single parameter checking module handles multiple types of validation (zero-value, maximum value, address alignment, memory checks) through configurable hardware circuits. The look-up tables provide a unified interface for selecting and configuring different check types, allowing comprehensive validation without requiring separate dedicated circuits for each check type, thus reducing overall complexity while maintaining data integrity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11921910B2Hardware secure element, related processing system, integrated circuit, and device
Publication Date: 2024.03.05 STMICROELECTRONICS APPL GMBH
  • US11921910B2 patent drawing
  • US11921910B2 patent drawing
  • US11921910B2 patent drawing

AI summary

A hardware secure element includes a processing unit and a receiver circuit configured to receive data comprising a command field and a parameter field adapted to contain a plurality of parameters. The hardware secure element also includes at least one hardware parameter check module configured to receive at an input a parameter to be processed selected from the plurality of parameters, and to process the parameter to be processed to verify whether the parameter has given characteristics. The hardware parameter check module has associated one or more look-up tables configured to receive at an input the command field and a parameter index identifying the parameter to be processed by the hardware parameter check module, and to determine for the command field and the parameter index a configuration data element.