Secure Enclave Processor Key Segmentation
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Solution Overview
Problem
Computing devices face challenges in securely managing and accessing encrypted data, as existing methods may not adequately prevent unauthorized access, especially when one processor is shut down or compromised, potentially allowing malicious actors to access sensitive information stored in separate encrypted portions of memory.
Innovation Solution
Implementing a computing device with a first general-purpose processor and a second processor for system security, using a secure enclave processor to manage separate encryption keys and mailboxes for each processor, ensuring that when one processor is shut down, its access keys are discontinued, and the memory controller continues to service requests from the other processor, enhancing system security by preventing cross-access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate encryption keys are used for each processor, then security against cross-access is improved, but device complexity increases
Solution Approach 1:
The patent divides the encryption key management into separate segments for each processor. Each processor has its own dedicated encryption key stored in secure memory, preventing one processor from accessing another processor's encrypted data. This segmentation approach directly improves security while managing complexity through organized separation of cryptographic resources.
Solution Approach 2:
The patent introduces a memory controller as an intermediary component that manages the distribution and protection of encryption keys. The memory controller acts as a mediator between processors and encrypted memory regions, controlling access based on processor identity and key availability. This intermediary structure improves security enforcement while centralizing key management to control system complexity.
2Reliability
If access keys are discontinued when one processor is shut down, then security against unauthorized access is improved, but ease of operation worsens
Solution Approach 1:
The patent implements dynamic key availability based on processor operational state. When a processor is shut down or compromised, its associated encryption key is automatically invalidated or removed from accessible memory regions. This dynamic adjustment of security parameters ensures that discontinued processors cannot access encrypted data, improving security while the system automatically manages the operational complexity through state-dependent key validity.
Solution Approach 2:
The patent changes the accessibility parameter of encryption keys based on processor operational status. When a processor is active, its key is available for decrypting assigned memory regions. When shut down, the key parameter changes to inaccessible or invalidated state. This parameter change approach automatically enforces security policies without requiring manual intervention, balancing security improvement with operational ease.
3Reliability
If encryption of stored information is employed, then security against unauthorized access is improved, but device complexity increases
Solution Approach 1:
The patent merges encryption functionality directly into the memory controller and processor interface. Rather than adding separate encryption hardware modules, the encryption and decryption operations are integrated into the existing memory management infrastructure. This merging approach provides strong security through hardware-based encryption while minimizing additional device complexity by utilizing existing system components for cryptographic operations.
Data Source
AI summary
Techniques are disclosed relating to data storage. In various embodiments, a computing device includes first and second processors and memory having stored therein a first encrypted operating system executable by the first processor and a second encrypted operating system executable by the second processor. The computing device also includes a secure circuit configured to receive, via a first mailbox mechanism of the secure circuit, a first request from the first processor for a first cryptographic key usable to decrypt the first operating system. The secure circuit is further configured to receive, via a second mailbox mechanism of the secure circuit, a second request from the second processor for a second cryptographic key usable to decrypt the second operating system, and to provide the first and second cryptographic keys.