Secure Erasure in Non-Volatile Memory Using Faster Re-Programming

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Solution Overview

Problem

Conventional methods for erasing data from non-volatile memory devices do not physically delete data, making it potentially recoverable, which is insecure for sensitive information.

Innovation Solution

A method using multiple analog memory cells, where data pages are stored with a first programming configuration and securely erased using a second configuration with a faster storage speed, involving sequences of programming pulses or verification thresholds that garble the data, rendering it irrecoverable.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional erasure methods are used to delete data from non-volatile memory, then the data is logically erased, but the data remains physically recoverable which compromises security

Engineering Contradiction:
Improvedata securityVSAvoiderasure time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the programming parameters (pulse magnitude, verification threshold) during the erasure process to physically alter the memory cells and render data irrecoverable, rather than using conventional logical erasure methods

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a first programming configuration is used to store data pages, then data is stored reliably, but secure erasure requires additional time overhead

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidsecure erasure time overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by storing data with specific programming configurations that facilitate faster secure erasure later, preparing the memory cells in advance for efficient erasure operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes in the programming configuration to enable faster secure erasure, by adjusting pulse magnitudes and verification thresholds to physically garble data more quickly

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If programming pulses with small increments are used to store data, then data is programmed accurately, but secure erasure becomes slower

Engineering Contradiction:
Improvedata programming accuracyVSAvoidsecure erasure speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent dynamically adjusts the programming pulse increment size based on the operation being performed - using smaller increments for accurate data storage and larger increments for faster secure erasure, optimizing both accuracy and speed for different operations

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the pulse increment parameter from small values during normal storage to large values during secure erasure, enabling faster data garbling while maintaining programming flexibility

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9098401B2Fast secure erasure schemes for non-volatile memory
Publication Date: 2015.08.04 APPLE INC
  • US9098401B2 patent drawing
  • US9098401B2 patent drawing
  • US9098401B2 patent drawing

AI summary

A method includes, in a memory with multiple analog memory cells, storing one or more data pages in respective groups of the memory cells using a first programming configuration having a first storage speed. Upon receiving a request to securely erase a data page from the memory, one or more of the memory cells in a group that stores the data page are re-programmed using a second programming configuration having a second storage speed that is faster than the first storage speed.