Secure Inter-Partition Communication via Shared Memory and Interrupts
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Solution Overview
Problem
Existing systems for secure communication between processor partitions fail to effectively manage trusted and distrusted entities, leading to potential data integrity issues and communication errors due to lack of proper security features and synchronization.
Innovation Solution
A method and system utilizing shared memory blocks and interrupts to facilitate secure communication between virtual boards, where messages are written to shared memory blocks and interrupts are sent to indicate message availability and consumption, ensuring data integrity and synchronization through an IPC control facility within the hypervisor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If shared memory blocks are used for communication between processor partitions, then communication speed is improved, but data integrity and security are worsened due to potential tampering by distrusted entities
Solution Approach 1:
The patent introduces an intermediary control facility within the hypervisor that mediates all access to shared memory blocks. This intermediary enforces security policies, validates communication between partitions, and prevents tampering by distrusted entities while maintaining the performance benefits of shared memory. The control facility acts as a trusted broker that enables fast communication without compromising data integrity.
2Reliability
If security features are added to manage trusted and distrusted entities, then data integrity is improved, but system complexity is worsened
Solution Approach 1:
The patent merges security management functions directly into the existing hypervisor architecture rather than adding separate security subsystems. The control facility is integrated into the hypervisor's memory management and interrupt handling mechanisms, allowing security policies to be enforced without requiring additional complex infrastructure. This consolidation maintains data integrity while minimizing increases in system complexity.
3Reliability
If synchronization mechanisms are implemented for secure communication, then communication reliability is improved, but processing overhead is worsened
Solution Approach 1:
The patent implements preliminary synchronization by pre-establishing security contexts and communication channels between partitions before actual data exchange occurs. The control facility pre-validates communication permissions and sets up protected pathways, so that during actual communication, minimal synchronization overhead is required. This preliminary setup ensures communication reliability without imposing continuous processing penalties.
Data Source
AI summary
A system and method for writing, by a sender, a message into blocks of a memory space, the memory space being shared by the sender of the message and a receiver of the message, and sending, by the sender, an interrupt corresponding to the message.