Secure Inverse Square Root Computation via Bit Decomposition

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Solution Overview

Problem

Existing methods for secure computation, such as those described in NPL 1, are computationally expensive and inefficient for calculating the inverse of a square root.

Innovation Solution

A secure inverse square root computation system and method that utilizes a network of secure computation apparatuses to efficiently calculate the inverse of a square root by decomposing input values into bit sequences, generating normalization multipliers, and performing inverse normalization operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing secure computation methods are used to calculate the inverse of a square root, then the calculation can be performed securely, but the computational cost is high and processing speed is slow

Engineering Contradiction:
Improvesecure computationVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the calculation process into distinct modules: bit decomposition unit that breaks down the input share value into bit sequences, normalization multiplier generation unit that creates optimization multipliers, inverse square root calculation unit that performs the core computation, and inverse normalization unit that restores the result. This segmentation allows each unit to be optimized independently, improving overall processing speed while maintaining secure computation through share value manipulation throughout the pipeline.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by generating normalization multipliers before the inverse square root calculation. The bit decomposition unit processes the input share value in advance to create optimized bit sequences, and the normalization multiplier generation unit prepares optimization multipliers based on these sequences. This preliminary processing reduces the computational burden during the actual inverse square root calculation, significantly improving processing speed.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If existing secure computation methods are used to calculate the inverse of a square root, then the calculation can be performed securely, but the computational complexity is high

Engineering Contradiction:
Improvesecure computationVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes parameters by representing all computations in terms of share values and bit sequences rather than direct numerical operations. The system transforms the input share value [a] into bit sequences {a₀}, {a₁}, ..., {aλ-1} and processes throughout the calculation pipeline using these representations. This parameter change simplifies the computational complexity by enabling efficient bitwise operations and share value manipulations instead of complex mathematical operations on encrypted data.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces intermediary elements including bit sequences as intermediaries between the input share value and the final result. The bit decomposition unit creates these intermediary bit sequences that facilitate the calculation. Additionally, normalization multipliers serve as intermediaries that simplify the inverse square root computation. These intermediaries reduce computational complexity by breaking down complex operations into simpler steps that can be performed efficiently on share values.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4095833B1Secure square root reciprocal computation system, secure normalization system, methods for same, secure computation device, and program
Publication Date: 2025.03.12 NT T INC
  • EP4095833B1 patent drawingFigure 1
  • EP4095833B1 patent drawingFigure 2
  • EP4095833B1 patent drawingFigure 3

AI summary

In secure computation, the inverse of a square root is calculated at high speed. A secure inverse square root computation system (100) receives [a] as an input and calculates [1/√a]. The bit decomposition unit (11) generates a bit representation {a0}, ..., {aλ - 1} of a. A first bit sequence generation unit (12) calculates {a'i} = {ai} ∨ {ai + 1} to generate {a'0},..., {a'λ' - 1}. A flag sequence generation unit (13) generates {x0}, ..., {xλ' - 1} indicating a most significant bit of {a'0},..., {a'λ' - 1}. A normalization multiplier generation unit (14) generates [c'] by bit-connecting {xλ'-1}, ..., {x0}. A second bit sequence generation unit (15) sets {a"i} = {a2i} to generate {a"0}, ..., {a"λ' - 1}. A flag calculation unit (16) sums {xj}{a"j} to calculate a share value {r}. A normalization unit (18) calculates [b]: = [c'][c'][2a] when r = 1 and [b]: = [c'][c'][a] when r = 0. An inverse square root calculation unit (19) calculates [w]: = [1/√b] ∗ √2 when r = 1, and [w]: = [1/√b] when r = 0. An inverse normalization unit (20) multiplies [1/√a]: = [w][c'].