Hardware-Initiated Secure Key Update for Page-Based Memory Operations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In multi-processor systems, existing memory operations require software to issue separate commands for moving or clearing pages and writing secure storage keys, leading to inefficiencies and performance bottlenecks, especially during workload startups and terminations, as the software must wait for hardware processing and then issue additional commands.
Innovation Solution
The integration of a hardware acceleration engine controller that combines memory operations with secure storage key writing as an atomic part of page move and pad/clear commands, enabling simultaneous execution of these operations through enhanced instruction set architecture commands, such as Move Page & Write Key and Store Pad & Write Key, which validate addresses and perform checks before proceeding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate software commands are used for memory operations and key writing, then security is maintained through validation, but system performance deteriorates due to command overhead and waiting time
Solution Approach 1:
The patent combines the memory operation command and the secure storage key write command into a single atomic hardware operation. When the processor issues a move page, store pad, or page clear command, the hardware automatically performs both the memory operation and the key write simultaneously, eliminating the need for separate software commands while maintaining security validation through hardware-initiated checks.
2Ease of operation
If separate commands are issued for memory operations and key updates, then operational control is maintained, but time is lost due to sequential execution and waiting
Solution Approach 1:
The hardware is pre-configured with the ability to initiate secure storage key updates automatically when certain memory operations are detected. The memory controller monitors for specific command patterns (move page, store pad, page clear) and preemptively executes the key write operation as part of the same atomic transaction, eliminating the time loss associated with sequential command execution.
3Productivity
If hardware automatically writes keys with memory operations, then productivity improves through reduced overhead, but device complexity increases
Solution Approach 1:
The memory controller is designed with multi-functionality, serving both as a standard memory management unit and as an automatic secure key management system. The same hardware structure that handles conventional memory operations is enhanced to detect specific command patterns and automatically initiate key writes, eliminating the need for separate dedicated key management hardware while maintaining system efficiency.
Data Source
AI summary
Methods and systems for secure storage protection for memory operations are provided. Aspects include providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors, wherein each of the plurality of clusters share a first cache memory, providing a cluster shared cache integrated circuit to manage a second cache memory shared among the plurality of clusters, providing a system memory associated with each of the plurality of clusters, receiving, by a memory controller, a memory operation request from one of the plurality of processors, wherein the memory operation includes a store command, and wherein the memory controller is configured to perform the memory operation and atomically write a secure storage key for the memory operation with the store command of the memory operation.