Secure Host-Side Logical-to-Physical Pointer Caching
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Solution Overview
Problem
Current memory systems face challenges in efficiently caching logical-to-physical (L2P) pointers, which can lead to increased latency and security vulnerabilities due to the need for large RAM resources and exposure of physical address structures, particularly when malicious actors attempt to intercept or spoof these pointers.
Innovation Solution
Implementing secure L2P caching by generating and verifying digital signatures for L2P pointers using a shared cryptographic key, where the memory system and host device both generate and verify digital signatures, ensuring authenticity and integrity of the pointers, and utilizing a monotonic counter to prevent replay attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If L2P pointers are cached at the memory system using large RAM resources, then data retrieval speed is improved, but system cost and power consumption increase
Solution Approach 1:
The patent extracts the L2P pointer caching function from the memory system and relocates it to the host device. The host device maintains the L2P pointer cache in its own memory, eliminating the need for dedicated RAM at the memory system while enabling fast pointer lookup. This resolves the contradiction by removing the harmful dependency on large RAM resources at the memory system.
Solution Approach 2:
The patent introduces a cryptographic verification mechanism as an intermediary between the memory system and host device. Digital signatures and verification codes enable secure pointer caching at the host without requiring trusted hardware modules, mediating the trust relationship and enabling the caching architecture to function securely.
2Productivity
If physical address structures are exposed for L2P pointer caching, then pointer lookup efficiency is improved, but security vulnerabilities increase due to spoofing attacks
Solution Approach 1:
The patent applies preliminary anti-action by pre-computing and attaching cryptographic verification codes to L2P pointers before they are cached at the host device. This preventive measure ensures that any spoofed or tampered pointers can be detected and rejected, countering potential spoofing attacks before they can cause harm.
Solution Approach 2:
The patent implements a feedback mechanism where the host device verifies the cryptographic signatures of cached L2P pointers before use. This continuous verification process provides feedback on pointer integrity, enabling the system to detect and reject spoofed pointers while maintaining efficient lookup operations for valid pointers.
3Reliability
If cryptographic verification is implemented for L2P pointers, then security against spoofing is improved, but processing time increases
Solution Approach 1:
The patent applies preliminary action by pre-computing cryptographic verification codes and attaching them to L2P pointers when they are generated or updated at the memory system. This advance preparation eliminates the need for complex real-time cryptographic computations during pointer verification, significantly reducing processing time while maintaining security.
Solution Approach 2:
The patent uses lightweight cryptographic verification codes that can be quickly computed and verified, rather than relying on heavy cryptographic protocols. These verification codes are disposable and can be regenerated when L2P pointers change, providing security with minimal processing overhead.
Data Source
AI summary
Various examples are directed to a host device comprising a memory system, a host device memory, and a processor. The processor is programmed to receive from the memory system a first logical-to-physical (L2P) pointer message that comprises a first L2P pointer and a first digital signature. The processor executes a cryptographic operation based at least in part on the first L2P pointer and a cryptographic key and verifies the first digital signature based at least in part on the cryptographic operation. The processor caches the first L2P pointer at the host device memory.