Multi-Level Power-On Reset Circuit for Secure Low Voltage IC Testing
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Solution Overview
Problem
The increasing complexity of integrated circuits leads to challenges in low voltage testability, as they often stop functioning properly with a sufficient drop in voltage, making secure testing difficult and potentially causing product failure, and existing onboard testing methods do not effectively address this issue.
Innovation Solution
A multi-level power on reset circuit is implemented, allowing for selective bypass of reset signals to enable secure testing at low voltages by distinguishing between normal, first, and second voltage levels, enabling pass/fail and characterization tests while preventing unauthorized low voltage operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If low voltage testing is performed to obtain circuit characteristics and predict failures, then testing capability is improved, but circuit reliability deteriorates because the circuit stops functioning properly at low voltage
Solution Approach 1:
The patent segments the voltage detection and reset control into distinct functional blocks: voltage detection circuit (220) that monitors supply voltage, reset circuit (204) that generates reset signals, and test logic (208) that controls test operations. This segmentation allows independent optimization of testing capability while protecting circuit reliability through controlled bypass of reset signals only during authorized test modes
Solution Approach 2:
The patent introduces an intermediary security state circuit (224) and match circuit (216) that acts as a mediator between the test logic and voltage detection/reset circuits. This intermediary verifies authorization before allowing bypass of reset signals, ensuring that low voltage testing is performed only when authorized while maintaining circuit reliability during normal operation
2Productivity
If onboard testing is implemented to reduce test time, then productivity is improved, but test security worsens because unauthorized low voltage operations may be performed
Solution Approach 1:
The patent implements preliminary action by requiring security verification through match circuit (216) before allowing any low voltage test operations. The security state circuit (224) pre-establishes authorized test conditions, and the match circuit verifies these conditions are met before permitting bypass of reset signals. This preliminary security check prevents unauthorized operations while enabling efficient onboard testing when authorized
3Measurement precision
If reset signals are bypassed to enable low voltage testing, then testing capability is improved, but circuit protection deteriorates
Solution Approach 1:
The patent implements dynamic control where the bypass of reset signals is not static but changes based on real-time conditions. The test logic (208) dynamically enables bypass only when test mode is activated and security is verified through match circuit (216). During normal operation, reset signals remain active for protection. This dynamic approach allows testing capability when needed while maintaining circuit protection during normal operation
Solution Approach 2:
The patent changes the operational parameter of reset signal status from always active to conditionally bypassed. The voltage detection circuit (220) continues to monitor supply voltage, but the reset circuit (204) output is dynamically controlled by test logic (208) based on mode and security parameters. This parameter change enables testing at low voltages while maintaining protection through conditional reset signal activation
Data Source
AI summary
An integrated circuit includes a normal voltage detector configured to detect a normal voltage at which the integrated circuit being fully functional. A first voltage detector detects a first voltage that is less than the normal voltage. A second voltage detector detects a second voltage that is less than the first voltage. A reset module is coupled to a supply voltage, the normal voltage detector, the first voltage detector, and the second voltage detector. The reset module includes test logic to, when the supply voltage rises to the first voltage from the second voltage, perform a pass/fail test when the integrated circuit is in a pass/fail test mode, and perform a power up reset when the integrated circuit in not in the pass/fail test mode.


