Secure Multi-Channel Railway Computer Memory Error Correction
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Solution Overview
Problem
Existing secure computers in railway systems face challenges in detecting and correcting random memory errors without additional hardware, which can lead to system shutdowns and reduced availability, despite meeting high safety requirements like SIL 3 or SIL 4.
Innovation Solution
A software-based method that calculates and compares check values for data in redundant memory facilities, replacing data between channels if check values mismatch with stored old values to correct memory errors, using CRC or hash calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional hardware such as shadow memory or ECC memory is used to detect and correct memory errors, then memory error detection and correction capability is improved, but device complexity and cost increase
Solution Approach 1:
The patent replaces hardware-based error detection mechanisms (shadow memory, ECC memory) with a software-based solution using check value calculation and comparison. The control device executes software routines that calculate check values for data in first and second memory facilities, compare these check values, and automatically correct errors by selecting valid data, thereby eliminating the need for additional error-correcting hardware components.
2Reliability
If memory errors are detected by comparing two independent memory facilities, then memory error detection capability is improved, but system availability decreases due to shutdowns
Solution Approach 1:
The patent implements a self-service error correction mechanism where the control device automatically detects memory errors through check value comparison and corrects them by selecting valid data from either the first or second memory facility, eliminating the need for manual intervention or system shutdowns. The control device serves itself by autonomously identifying and correcting errors, thereby maintaining continuous system operation and high availability.
Solution Approach 2:
The patent employs feedback mechanisms where the control device continuously calculates check values for data in both memory facilities, compares these check values, and uses the comparison results to determine which data is valid. This closed-loop feedback system enables real-time error detection and correction without interrupting system operation, maintaining both reliability and availability.
3Device complexity
If a software-based method is used to detect and correct memory errors without additional hardware, then device complexity is reduced, but measurement precision and error detection reliability may be compromised
Solution Approach 1:
The patent applies preliminary action by calculating and storing check values for data in memory facilities before actual data processing occurs. The control device pre-calculates check values for both the first and second memory facilities, so when data needs to be accessed, the validity can be immediately determined by comparing pre-computed check values, ensuring high detection accuracy without additional hardware.
Data Source
AI summary
A method for automatically detecting and correcting memory errors in a secure multichannel railway computer provides each channel with at least one memory and the same data stored in parallel in the memories. A first check value is calculated for data in a subregion of the first memory and a second check value is calculated for the same data in a subregion of the second memory. First and second check values are compared and if different, first and/or second check values are compared with an old check value. Data in the subregion of the first memory are replaced by data in the subregion of the second memory if the second check value corresponds to the old check value. Data in the subregion of the second memory are replaced by data in the subregion of the first memory if the first check value corresponds to the old check value.