Secure Memory Interface Fault Injection Detection
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Solution Overview
Problem
Existing memory devices are vulnerable to fault injection attacks, such as those using lasers or X-rays, which can modify bit states and compromise data integrity, and current detection methods either increase silicon area, slow down operations, or fail to detect attacks outside the memory device.
Innovation Solution
A secure memory interface with a reader and writer block, utilizing a mode selector to activate or deactivate a secure mode based on memory access information, separates error detection code from data when necessary, and includes hardware logic gates to detect fault injections within the memory device and on the bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection code is stored within the memory device for detecting fault injection attacks, then detection capability is improved, but silicon area is increased
Solution Approach 1:
The error detection code is extracted from the memory device and stored in the data processing unit instead. This allows the memory device to maintain its original silicon area while the data processing unit performs error detection on retrieved data, resolving the contradiction between detection capability and silicon area.
Solution Approach 2:
The bus serves as an intermediary channel between the memory device and data processing unit. Error detection code is transmitted through this intermediary from the memory device to the data processing unit, enabling detection functionality without permanently storing it in the memory device, thus avoiding silicon area increase.
2Reliability
If hardware redundancy with redundant data storage is used for detection of fault injection, then detection capability is improved, but silicon area is significantly increased
Solution Approach 1:
The error detection functionality is extracted from the memory device's hardware redundancy structure and relocated to the data processing unit. This eliminates the need for redundant data storage in the memory device, thereby avoiding significant silicon area increase while maintaining detection capability through software-based verification.
Solution Approach 2:
Instead of creating physical redundant copies of data storage in the memory device, the invention uses software copying of error detection algorithms in the data processing unit. This virtual copying approach provides detection capability without duplicating physical memory structures, thus avoiding silicon area multiplication.
3Reliability
If software verification is implemented in the CPU for data integrity, then detection capability is improved, but code size and execution time are increased
Solution Approach 1:
Error detection code is preliminarily generated and stored alongside the main data in the memory device before retrieval. When data is fetched, the corresponding error detection code is simultaneously retrieved and verified in the data processing unit. This preliminary preparation enables rapid verification without additional execution time, as both data and verification code are already available in ready state.
Solution Approach 2:
The error detection process operates continuously alongside normal data retrieval operations. The data processing unit continuously verifies error detection code whenever data is fetched from memory, making verification an integrated part of the data access workflow rather than a separate batch process. This continuous operation maintains system throughput while providing ongoing data integrity protection.
Data Source
AI summary
A secure memory interface includes a reader block, a writer block, and a mode selector for detecting fault injection into a memory device when a secure mode is activated. The mode selector activates or deactivates the secure mode using memory access information from a data processing unit. Thus, the data processing unit flexibly specifies the amount and location of the secure data stored into the memory device.