Secure Memory Test Mode via Vector Conversion
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Solution Overview
Problem
Secured memory devices are vulnerable to attacks during test mode, as unauthorized access or modification can occur due to the ability to write meaningful data and expose sensitive information, which existing technologies fail to adequately protect.
Innovation Solution
A memory device system that operates in test mode by only allowing writing of predefined test patterns, converting unauthorized data into valid patterns, and encoding error information to disguise exact error locations, while using a one-way function to verify data integrity and protect against brute-force attacks by disabling testing mode if thresholds are exceeded.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If test mode allows writing arbitrary data to memory, then testing coverage and diagnostic capability are improved, but security is worsened due to vulnerability to unauthorized access and data modification attacks
Solution Approach 1:
The patent introduces a test pattern conversion mechanism as an intermediary between the external tester and the memory device. This converter validates incoming test patterns against a predefined set, converts unauthorized patterns to valid ones, and controls what data actually reaches the memory cells during testing. This intermediary layer enables comprehensive testing while blocking unauthorized data injection and protecting sensitive memory locations.
2Measurement precision
If error location information is fully exposed during testing, then diagnostic precision is improved, but security is worsened by revealing sensitive information about memory device structure and operation
Solution Approach 1:
The patent extracts only the essential error diagnostic information (error count, parity status) from the full error location data while leaving out the sensitive detailed location information that could reveal memory device structure. The error information is processed to separate useful diagnostic data from sensitive structural data, exposing only what is necessary for functional testing while protecting device-specific details.
3Object-affected harmful factors
If test patterns are converted to predefined patterns, then security is improved by blocking unauthorized data, but testing effectiveness is worsened by limiting the variety of test data
Solution Approach 1:
The patent designs a small set of universal test patterns that can effectively test multiple memory configurations and error conditions. These predefined patterns are carefully selected to cover various test scenarios (read-after-write, parity checking, error injection) across different memory device types. The universality of these patterns compensates for their limited variety, maintaining both security and testing effectiveness.
Data Source
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AI summary
A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.