Secure MMIO Memory Mapping for Confidential Accelerator Access

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current confidential computing architectures centered on CPUs fail to meet the requirements of heterogeneous computing scenarios, lacking in security, efficiency, and usability, and are vulnerable to data breaches in non-secure environments.

Innovation Solution

A device access method and apparatus that utilizes a secure world and a non-secure world to manage memory and accelerator access through memory-mapped input/output (MMIO) addresses, ensuring secure communication and resource allocation in a heterogeneous computing environment, using session keys for encryption and integrity checks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a CPU-centered confidential computing architecture is used, then data security is improved, but adaptability to heterogeneous computing architectures deteriorates

Engineering Contradiction:
Improvedata securityVSAvoidadaptability to heterogeneous computing architectures
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system divides computing resources into secure and non-secure domains, with the secure domain handling confidential computations while the non-secure domain handles general computations. This segmentation allows the confidential computing architecture to coexist with heterogeneous computing architectures while maintaining security boundaries.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a memory manager as an intermediary component that mediates between the secure and non-secure domains. The memory manager handles memory allocation, mapping, and access control, enabling the CPU-centered confidential computing architecture to adapt to heterogeneous computing scenarios through a dedicated intermediary layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a CPU-centered confidential computing architecture is used, then data security is improved, but computing efficiency deteriorates

Engineering Contradiction:
Improvedata securityVSAvoidcomputing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting computational tasks into secure and non-secure domains, the system can offload appropriate tasks to different processors, improving overall computing efficiency while maintaining security for critical operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic memory management and resource allocation that adapts to varying computational workloads. The memory manager dynamically adjusts memory mappings and access rights based on current system state, optimizing computing efficiency while preserving security boundaries.

Inventive Principle:
Principle #15Dynamics

3Reliability

If a CPU-centered confidential computing architecture is used, then data security is improved, but ease of operation deteriorates

Engineering Contradiction:
Improvedata securityVSAvoidease of operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The memory manager serves as a user-friendly intermediary that abstracts the complex memory management details from users and applications. It provides simplified interfaces for memory allocation and access control, making the secure computing environment easier to operate while maintaining strong security.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a universal memory management framework that can handle various types of memory access patterns and computational workloads through a single integrated system, improving ease of operation across different scenarios while preserving security.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Productivity

If memory access is enabled in non-secure world, then computing efficiency is improved, but data security deteriorates

Engineering Contradiction:
Improvecomputing efficiencyVSAvoiddata security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by providing different memory access permissions and security attributes to different memory regions. The secure domain receives privileged access to protected memory, while the non-secure domain receives limited access to public memory, enabling efficient computation without compromising data security.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary memory classification and permission assignment before computing operations begin. Memory regions are pre-marked as secure or non-secure, and access control policies are pre-configured, preventing security breaches while enabling efficient memory access patterns during execution.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4693087A1Device access method and apparatus
Publication Date: 2026.02.11 HUAWEI TECH CO LTD
  • EP4693087A1 patent drawingFigure 1~2
  • EP4693087A1 patent drawingFigure 3
  • EP4693087A1 patent drawingFigure 4

AI summary

Embodiments of this application provide a device access method and apparatus. The method is applied to a first device. The first device includes a secure world and a non-secure world. The method includes: The first device receives first request information sent by a server, where the first request information is used to request the first device to determine a first memory address, and the first memory address corresponds to a first MMIO address in a secure world of the server; and the first device determines the first memory address in the secure world of the first device based on the first request information. According to the foregoing method, a data channel established between the server and the first device cannot be stolen by software in the non-secure world, so that a confidential computing requirement of a tenant in a heterogeneous computing architecture scenario is met.