Secure Object Execution Across Heterogeneous Processors
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Solution Overview
Problem
As computer systems become more heterogeneous, incorporating various types of processors such as GPUs and AI-specific processors, there is a growing need to protect the security and integrity of applications running on these systems from malware and other forms of attacks.
Innovation Solution
The implementation of secure execution support for Artificial Intelligence (AI) systems and other heterogeneous systems, which involves creating Secure Objects that can be executed across different types of processors. These Secure Objects are protected through cryptographic means, allowing them to securely call other processors for processing while maintaining integrity and confidentiality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If Secure Objects are executed on heterogeneous processors (GPUs, AI processors), then processing capability and performance are improved, but security and integrity protection become more difficult to maintain
Solution Approach 1:
The system segments the heterogeneous processor architecture into trusted execution environments (secure regions) and untrusted regions. Each processor type (CPU, GPU, AI processor) can contain secure enclaves that host portions of Secure Objects, with each enclave maintaining its own cryptographic protection boundaries. This allows Secure Objects to be distributed across multiple processor types while maintaining security through spatial segmentation of trusted and untrusted code regions.
Solution Approach 2:
The patent introduces intermediary components including a secure monitor, cryptographic authentication mechanisms, and inter-processor communication protocols that act as mediators between Secure Objects and the heterogeneous processor environment. These intermediaries verify integrity, authenticate processors, and manage secure communication channels, enabling Secure Objects to safely execute across different processor types without direct exposure to untrusted software on those processors.
2Reliability
If cryptographic protection is applied to Secure Objects, then security and integrity are improved, but system complexity increases
Solution Approach 1:
The patent implements universal cryptographic primitives and authentication protocols that can be applied across all processor types in the heterogeneous system. A single secure monitor architecture and set of cryptographic mechanisms serve multiple functions: protecting Secure Objects on CPUs, GPUs, and AI processors; managing inter-processor communication security; and verifying integrity across the entire heterogeneous system. This multi-functional approach reduces overall system complexity compared to implementing separate security mechanisms for each processor type.
3Adaptability or versatility
If Secure Objects can call multiple processor types, then versatility and adaptability are improved, but the risk of malware attacks increases
Solution Approach 1:
The system applies preliminary anti-action through cryptographic authentication and integrity verification that occurs before Secure Objects invoke operations on heterogeneous processors. Each processor must present cryptographic proof of its trusted execution environment status before being allowed to execute Secure Object code. This pre-verification mechanism prevents malware from compromising Secure Objects by establishing security boundaries in advance, allowing the system to safely leverage the versatility of multiple processor types.
Data Source
AI summary
A method and apparatus for providing support for Secure Objects on a data processing system including providing a Secure Object comprising code and data that is protected on the data processing system on a first processor which is a first type of processor, wherein the data processing system includes a plurality of processors of different types, responsive to a portion of the Secure Object being needed to be executed on a second processor which is a second type of processor different than the first type of processor, by the first processor calling the second processor in a special interprocessor call, returning information by the second processor to the first processor, and retrieving, by the first processor, the information from the second processor.