Secure Mode Page Table Data Splitting for Memory Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Data processing systems with secure and non-secure modes face security vulnerabilities due to unauthorized alterations of secure mode page table data, which can lead to unintended access to non-secure regions, compromising system security, and require large memory capacity for storing secure mode page table data despite limited secure data storage needs.

Innovation Solution

Implementing a hierarchical page table structure with table security fields to differentiate between secure and non-secure region storage, allowing secure mode page table data to be split between secure and non-secure memory regions, and using memory control circuitry to identify and block unauthorized access attempts by determining the storage location of page table data during memory access operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all secure mode page table data is stored within secure regions of memory, then security is improved by protecting from unauthorized alteration, but memory capacity consumption of secure regions increases disadvantageously

Engineering Contradiction:
ImprovesecurityVSAvoidmemory capacity consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides secure mode page table data into two segments: critical secure mode page table data (first portion) is stored in secure regions, while non-critical secure mode page table data (second portion) is stored in non-secure regions. This segmentation allows the system to maintain security for critical data while reducing overall consumption of secure memory capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different storage locations based on the security requirements of different portions of page table data. Critical data requiring high security is placed in secure regions, while non-critical data is placed in non-secure regions. This local quality approach optimizes the balance between security and memory resource utilization.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If secure mode page table data is stored in non-secure regions, then memory capacity usage of secure regions is reduced, but security is compromised due to unauthorized alteration risk

Engineering Contradiction:
Improvememory capacity usageVSAvoidsecurity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments page table data into critical and non-critical portions, storing only non-critical data in non-secure regions while keeping critical data in secure regions. This selective segmentation maintains security for essential data while allowing flexible storage for less sensitive data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different storage locations are assigned based on the security sensitivity of specific page table data portions. Non-critical data is locally placed in non-secure regions to optimize memory usage, while critical data remains in secure regions to maintain security integrity.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If hierarchical page table structure with table security fields is implemented, then memory usage is optimized by splitting storage, but device complexity increases

Engineering Contradiction:
Improvememory usageVSAvoidstructure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements a hierarchical page table structure where the first-level page table is stored in secure regions and second-level page tables are stored in non-secure regions. This segmentation enables optimized memory usage while maintaining manageable structural complexity through a two-level hierarchy.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8296538B2Storing secure mode page table data in secure and non-secure regions of memory
Publication Date: 2012.10.23 ARM LTD
  • US8296538B2 patent drawing
  • US8296538B2 patent drawing
  • US8296538B2 patent drawing

AI summary

Apparatus for data processing 2 is provided with processing circuitry 8 which operates in one or more secure modes 40 and one or more non-secure modes 42. When operating in a non-secure mode, one or more regions of the memory are inaccessible. A memory management unit 24 is responsive to page table data to manage accesses to the memory which includes a secure memory 22 and a non-secure memory 6. Secure mode page table data 36, 38 is used when operating in one of the secure modes. A page table entry within the hierarchy of page tables of the secure mode page table data includes a table security field 68, 72 indicating whether or not a further page table pointed to by that page table entry is stored within the secure memory 22 or the non-secure memory 6. If any of the page tables associated with a memory access are stored within the non-secure memory 6, then the memory access is marked with a table attribute bit NST indicating that the memory access should be treated as non-secure.