Secure Pipeline Manager With Dual Crypto-Processors

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Solution Overview

Problem

Current data storage devices lack a secure and efficient data path for cryptographic operations, which compromises data security and power consumption.

Innovation Solution

A data storage device with a secure data path featuring two crypto-processors, where one CPU controls the storage memory and another dedicated CPU manages the secure data path, employing algorithms like AES, DES, and SHA, with the secondary CPU having access to secret keys and consuming less power than the primary CPU, even when the primary CPU is in idle mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single CPU controls both storage memory and secure data path operations, then device complexity is reduced, but security is compromised because the same CPU has access to all data including secret keys

Engineering Contradiction:
ImprovesecurityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system divides control functions into two separate CPUs: a first CPU that controls storage memory operations and a second CPU that controls secure data path operations. This segmentation ensures that the second CPU, which has access to secret keys, does not have access to storage memory, thereby enhancing security while maintaining manageable device complexity through functional separation.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If cryptographic operations are performed using software algorithms, then adaptability to different encryption standards is improved, but processing speed deteriorates compared to hardware implementations

Engineering Contradiction:
Improvealgorithm compatibilityVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The crypto-processors are designed to execute multiple cryptographic algorithms (AES, DES, 3DES, SHA1, SHA256, SHA384, SHA512, RC4) through software implementation. This universal approach allows the same hardware structure to handle various encryption standards, providing adaptability while maintaining acceptable processing speeds through optimized software routines and efficient CPU execution.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If the primary CPU is used for all processing tasks, then computational power is maximized, but power consumption increases unnecessarily when full processing capability is not required

Engineering Contradiction:
Improvecomputational powerVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The system segments computational tasks between a primary CPU and a secondary CPU. The secondary CPU is specifically designed to handle secure data path operations and cryptographic functions, allowing it to operate independently for these tasks without requiring the primary CPU to remain active. This enables the primary CPU to enter idle or low-power modes when not needed for storage memory operations, reducing overall power consumption while maintaining adequate computational power through task distribution.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8429426B2Secure pipeline manager
Publication Date: 2013.04.23 SANDISK ISRAEL LTD
  • US8429426B2 patent drawing
  • US8429426B2 patent drawing
  • US8429426B2 patent drawing

AI summary

A method for data storage includes supplying data to and from a host to a storage memory via a secure data path. A first CPU is employed to control operation of the storage memory, and a second CPU is employed to control operation of the secure data path.