Secure Processor With Encoded Instructions
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Solution Overview
Problem
Network devices are vulnerable to attacks that exploit flaws in the operating software stack, allowing attackers to execute malicious machine-language instructions, thereby gaining control of the device.
Innovation Solution
A processor with an instruction fetcher, decoder, and instruction processor that encodes and decodes machine-language instructions using a unique key, such as a MAC address, to prevent unauthorized execution, employing decoding tables to map encoded to decoded instructions, ensuring only valid instructions are executed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If machine-language instructions are executed directly without encoding, then processor execution speed is maintained, but the system becomes vulnerable to malicious code execution
Solution Approach 1:
The patent applies preliminary action by encoding machine-language instructions with a unique key before they are stored and executed. The encoding is performed in advance during system initialization or instruction loading, transforming the instructions into an encoded format that requires decoding before execution. This preliminary encoding step ensures that even if malicious instructions are injected, they cannot be executed without the correct key, thus preventing security vulnerabilities while maintaining a relatively simple execution process.
2Reliability
If instructions are encoded using a unique key, then unauthorized execution is prevented, but decoding overhead increases processing time
Solution Approach 1:
The patent applies partial action by implementing a hybrid decoding approach where only certain instructions are decoded using the unique key, while other instructions are executed directly. The system identifies and decodes only the critical instructions that require security verification, allowing non-critical instructions to bypass the decoding step. This selective decoding reduces the overall overhead and maintains higher instruction execution speed while still providing security where needed.
3Reliability
If all instructions are decoded using decoding tables, then security is enhanced, but memory access time increases
Solution Approach 1:
The patent applies the extraction principle by separating the decoding operation from the main execution flow. Instead of accessing decoding tables for every instruction, the system extracts and caches the decoded form of frequently executed instructions in a separate cache structure. When an instruction is encountered, the system first checks the cache for a match, and only accesses the decoding tables if the instruction is not found in the cache. This extraction and caching mechanism significantly reduces memory access time while maintaining security.
Data Source
AI summary
A processor includes an instruction fetcher, a decoder, and an instruction processor. The instruction fetcher retrieves encoded machine-language instructions. The encoded machine-language instructions are encoded according to a predetermined key assigned only to the processor. The predetermined key is independent of opcodes of the processor. The decoder decodes each of the encoded machine-language instructions according to the predetermined key. The instruction processor executes the decoded machine-language instructions.