Secure Reciprocal Computation for High-Precision Normalization
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Solution Overview
Problem
Existing secure computation technologies suffer from insufficient precision during normalization processes.
Innovation Solution
A secure computation system that includes bit decomposition, flag sequence generation, bit sequence generation, normalization multiplier generation, and normalization units to perform high-precision normalization by efficiently calculating the inverse of a value while maintaining data confidentiality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If normalization is performed in secure computation using related art methods, then data confidentiality is maintained, but approximation precision is insufficient
Solution Approach 1:
The patent segments the normalization process into multiple discrete steps: bit decomposition of the input value, generation of flag sequences indicating most significant bits, generation of bit sequences through logical operations, generation of normalization multipliers from these bit sequences, and final multiplication to achieve normalized values. This segmentation allows each step to be performed securely while maintaining high precision.
Solution Approach 2:
The patent performs preliminary actions by generating bit decomposition results, flag sequences, and bit sequences before the actual normalization multiplication. These preliminary computations establish the normalization multiplier in advance, ensuring that the final normalization step can be performed with high precision while maintaining security throughout the process.
2Measurement precision
If high-precision normalization is implemented in secure computation, then approximation precision improves, but computational complexity increases
Solution Approach 1:
The patent divides the complex normalization task into manageable segments: bit decomposition into individual bits, generation of flag sequences for most significant bits, logical operations to generate bit sequences, construction of normalization multipliers from these sequences, and final multiplication. This segmentation reduces overall computational complexity by breaking down the problem into standard, well-understood operations.
Solution Approach 2:
The patent employs dynamic adaptation in the bit sequence generation process, where the normalization multiplier is constructed based on the actual bit patterns of the input value. The flag sequences and bit sequences are generated dynamically according to the specific input, allowing the system to adapt to different values while maintaining a consistent computational framework.
3Measurement precision
If traditional normalization methods are used in secure computation, then implementation simplicity is maintained, but precision exceeds 23-bit requirement
Solution Approach 1:
The patent implements precision exceeding 23-bit requirements through systematic segmentation of the computation process. By decomposing values into bits, generating flag sequences for each position, and constructing normalization multipliers through sequential logical operations, the system achieves high precision without requiring a complete redesign of the secure computation infrastructure.
Solution Approach 2:
The patent performs preliminary bit decomposition and flag sequence generation to establish precise control over the normalization process. These preliminary actions enable the system to achieve precision beyond 23-bits by carefully managing each bit position through the flag and bit sequence generation before performing the final normalization multiplication.
Data Source
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AI summary
Normalization is performed with high precision in secure computation. A secure inverse computation system (100) receives [a] as an input and calculates [1/a]. The bit decomposition unit (11) generates a bit representation ao, ..., aλ-1 of a. The flag sequence generation unit (12) generates {x0}, ..., {xλ-1} indicating a most significant bit of {a0}, ..., {aλ-1}. A bit sequence generation unit (13) generates {y0}, ..., {yλ-1} in which {y0}, {y1}: = {0}, {yi} : = {(¬ai-2 ∧ xi-1) XORxi} (2 ≤ i < λ), {yλ} : = {¬aλ- 2 ∧ xλ-1}. The normalization multiplier generation unit (14) generates [c] obtained by bit-connecting {yλ-1}, ..., {y0}. The normalization unit (15) calculates [b]: = [a][c].