Secure Resource Loading via Block-Level Verification

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Solution Overview

Problem

Existing electronic terminals, such as smartphones and payment terminals, face slow loading times and high energy expenditure due to the need to verify the authenticity of entire application files before loading them into memory, especially when using secure flash memory with low bandwidth.

Innovation Solution

A method for loading computer resources that involves obtaining addresses of data blocks, loading current data blocks, obtaining reference and current certificates, and issuing assertions of validity, allowing only valid blocks to be copied into RAM, thereby reducing the need to load entire resources and enhancing security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire resource is loaded into RAM for verification, then security is ensured, but loading time increases

Engineering Contradiction:
ImprovesecurityVSAvoidloading time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the resource into multiple data blocks and verifies each block independently as it is loaded, rather than loading and verifying the entire resource at once. This segmentation allows verification to occur incrementally during the loading process, reducing the time the system waits for complete resource verification while maintaining security through block-level validation.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the entire resource is loaded into RAM, then complete verification is possible, but energy consumption increases

Engineering Contradiction:
Improveverification completenessVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements partial verification by checking only the necessary data blocks that are actually needed for the current operation, rather than verifying the entire resource. The verification process performs exactly the minimal necessary actions (checking only required blocks) without excessive verification of unnecessary data, thereby reducing energy consumption while maintaining verification completeness for the needed portions.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If secure flash memory is used with physical protection mechanisms, then security is enhanced, but bandwidth is limited

Engineering Contradiction:
ImprovesecurityVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the resource verification into smaller block-level operations that can be performed efficiently during the loading process. This segmentation allows the system to work within the limited bandwidth of secure flash memory by verifying data in manageable chunks rather than requiring high-speed bulk verification, thus accommodating the bandwidth constraints while maintaining security through systematic block validation.

Inventive Principle:
Principle #1Segmentation

4Ease of operation

If all executable files are fully loaded into RAM at system start, then system readiness is achieved, but startup time increases

Engineering Contradiction:
Improvesystem readinessVSAvoidstartup time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent implements preliminary verification of data blocks during the loading process itself, rather than requiring complete loading before verification can begin. This preliminary action approach allows verification to start as soon as the first blocks are loaded, overlapping the verification process with the remaining loading operations, thereby reducing startup time while ensuring system readiness through complete verification of necessary executables.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3179400B1Method for loading a computing resource into an electronic device, electronic module and corresponding computer program
Publication Date: 2023.04.12 BANKS & ACQUIRERS INT HLDG SAS
  • EP3179400B1 patent drawingFigure 1~2
  • EP3179400B1 patent drawingFigure 3~4
  • EP3179400B1 patent drawingFigure 5~6

AI summary

The invention relates to a method for loading a computing resource by a device comprising a processor and RAM, said loading being performed within said RAM of said device from mass storage, said resource being stored on said mass storage by means of at least one data block. Such a method comprises the following steps: - obtaining at least one address (Adr1, Adr2, ..., AdrN) corresponding to at least one data block (DBloc1, DBloc2, ..., DBlocN) within which the resource is at least partially registered; and for said at least one current address (Adri) previously obtained: - loading (110) of a current data block (DBloci) according to said current address (Adri); - obtaining (120) at least one reference certificate (CertRi) of the current data block (DBloci); - obtaining (130) at least one current certificate (CertCi) of the current data block (DBloci); - issuing (140) an assertion of validity (ArVi) according to said reference certificate (CertRi) and the current certificate (CertCi).