Secure Root of Trust Chip for Boot Code Verification

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Embedded processor systems lack sufficient built-in security measures to ensure the execution of trusted firmware/software, making them vulnerable to hacking and tampering, especially in systems without intrinsic secure boot features.

Innovation Solution

Implementing a secure SoC FPGA as an external root of trust chip that emulates external memory, verifies the integrity and authenticity of boot code using cryptographic challenge-response protocols and message authentication codes, and applies penalties for tampering, such as resetting the processor or disabling communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If processors import all instruction code from off-chip without authentication, then device complexity is reduced and ease of manufacture is improved, but security reliability deteriorates as systems become vulnerable to hacking and code tampering

Engineering Contradiction:
Improvesecurity reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an external root of trust chip as an intermediary component that performs cryptographic verification of boot code. This mediator handles the security functions that would otherwise require complex built-in security hardware, allowing standard processors to achieve secure boot capabilities through an external authentication partner.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The security functionality is segmented from the main processor and placed in a separate root of trust chip. This segmentation allows the processor to remain simple while the external chip provides specialized security functions, resolving the contradiction between security reliability and device complexity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If built-in security protection is added to processors, then security reliability is improved, but manufacturing cost and device complexity increase

Engineering Contradiction:
Improvesecurity reliabilityVSAvoidease of manufacture
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By using an external root of trust chip as a mediator, the patent avoids the need to integrate complex security hardware into every processor. The external chip provides the security functionality that would otherwise require expensive built-in protection, making secure boot accessible to standard processors without compromising ease of manufacture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If cryptographic verification is implemented during boot process, then security reliability is improved by preventing unauthorized code execution, but boot time increases due to additional verification steps

Engineering Contradiction:
Improvesecurity reliabilityVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The root of trust chip performs cryptographic verification of the boot code before the processor begins execution. By conducting this security check in advance during the initialization phase, the system ensures that only authenticated code is loaded, preventing unauthorized execution while establishing security before the main boot process begins.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9953166B2Method for securely booting target processor in target system using a secure root of trust to verify a returned message authentication code recreated by the target processor
Publication Date: 2018.04.24 MICROSEMI SOC CORP
  • US9953166B2 patent drawing
  • US9953166B2 patent drawing
  • US9953166B2 patent drawing

AI summary

A method for securely booting a target processor in a target system from a secure root of trust includes computing a message authentication code from boot code to be provided to the target processor, including an obfuscated algorithm for recreating the message authentication code in the target processor, serving the boot code to the target processor, executing the boot code to recreate the message authentication code in the target processor, serving the message authentication code back to the root of trust, comparing the returned message authentication code with the message authentication code generated in the root of trust, continuing execution of the boot code data if the returned message authentication code matches the message authentication code, and applying at least one penalty to the target system if the returned message authentication code does not match the message authentication code generated in the root of trust.