Secure Square Root Normalization Without Inverse Computation
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Solution Overview
Problem
Existing secure computation methods for calculating a square root are computationally expensive due to the need for obtaining and multiplying by the inverse of the square root.
Innovation Solution
A secure square root computation system that utilizes a plurality of secure computation apparatuses to efficiently calculate a square root by generating flag and bit sequences, performing logical sums, and applying normalization and inverse normalization techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the inverse of a square root is obtained and then multiplication is performed to calculate a square root, then the calculation can be completed, but the computational cost becomes expensive
Solution Approach 1:
The patent inverts the conventional approach by not calculating the inverse of the square root and then multiplying, but instead directly computing the square root through a specialized circuit architecture that processes secret-shared inputs through flag sequence generation, bit sequence generation, and direct square root calculation units, eliminating the need for inverse computation and subsequent multiplication operations
Solution Approach 2:
The patent segments the square root calculation into distinct functional units: flag sequence generation unit, bit sequence generation unit, and direct square root calculation unit. Each unit processes specific aspects of the calculation independently, allowing parallel processing and reducing overall computational complexity while maintaining security through secret sharing
2Ease of operation
If normalization processing is performed by moving a most significant bit in secure computation, then numerical values can be normalized to a certain range, but additional processing steps are required
Solution Approach 1:
The patent merges the normalization processing into the main square root calculation flow by integrating flag sequence generation and bit sequence generation units that perform normalization implicitly during the calculation process, rather than as separate preprocessing and postprocessing steps, thereby reducing the total number of processing steps while maintaining normalization capability
Data Source
AI summary
A flag sequence generator (12) generates {x0}, . . . , {xλ−1} indicating a msb of a. A bit sequence generator (13) calculates {yi}:={x2i} XOR {x2i+1} to generate {y0}, . . . , {yλ′−1}. A flag calculator (14) calculates an exclusive logical sum of all {xj} to calculate [r] for each odd j. A public value multiplier setting-unit (16) sets r′ that becomes √2 when λ is an odd and 1 when λ is an even. A normalization multiplier generator (17) bit-connects {y0}, . . . to generate [c′]. A normalization multiplier generator (18) bit-connects {xλ−1}, . . . to generate [c]. A normalizer (19) calculates [b]:=[a][c]. A square root calculator (20) calculates [w]:=[√b]*(r′/√2) when r=1, and [w′]:=[√b]*r′ when r=0. An inverse normalizer (21) calculates [w][c′] and performs λ′ bits right-shift.