Secure Write Logic Circuitry for Semiconductor Memory

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices face challenges in securely writing data without degrading performance, particularly in ensuring data robustness against unintentional overwrites and malicious attacks, while existing security features can impact performance.

Innovation Solution

The implementation of a secure write operation in semiconductor devices that includes encrypted information and authentication, using cryptographic algorithms like AES-GCM or AES-CCM, to authenticate the controller and execute secure write operations efficiently across multiple addresses, either sequentially or concurrently, enhancing data redundancy and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If authentication and encryption features are implemented to protect semiconductor devices, then security against malicious attacks and unintentional overwrites is improved, but device performance degrades due to additional processing overhead

Engineering Contradiction:
ImprovesecurityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs authentication and encryption operations in advance before the actual write operation. The controller and memory device exchange authentication information and encrypted data beforehand, so that when the write operation is initiated, the security verification is already complete, reducing the performance impact during critical write operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary authentication mechanism using option codes and encrypted information that mediates between the controller and memory device. This intermediary layer enables security verification without requiring complex real-time cryptographic operations during the write process, thus maintaining performance while ensuring security

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If double secure write operations are performed to ensure data robustness, then data protection against overwrites is improved, but write speed and productivity decrease

Engineering Contradiction:
Improvedata robustnessVSAvoidwrite speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple security verification steps into a single integrated secure write operation. By combining authentication, encryption, and the actual write operation into one unified process using option codes, the need for separate double write operations is eliminated, maintaining data robustness while improving write speed

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The option code mechanism provides multi-functionality by encoding multiple pieces of information (authentication data, encryption keys, write parameters) into a single data structure. This universal approach allows the system to perform multiple security functions in one operation, replacing the need for multiple sequential write operations

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If complex authentication protocols are implemented, then security against unauthorized access is improved, but device complexity and ease of operation worsen

Engineering Contradiction:
Improveauthentication securityVSAvoidprotocol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter representation by using option codes that encode multiple authentication and operation parameters in a compact format. Instead of requiring separate protocol steps for each authentication element, all parameters are transformed into a single encoded option code that simplifies the interaction interface while maintaining strong security

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12086457B2Managing secure writes in semiconductor devices
Publication Date: 2024.09.10 MACRONIX INTERNATIONAL CO LTD
  • US12086457B2 patent drawing
  • US12086457B2 patent drawing
  • US12086457B2 patent drawing

AI summary

Systems, devices, methods, and circuits for managing secure writes in semiconductor devices. In one aspect, a semiconductor device includes a memory array and logic circuitry coupled to the memory array. The logic circuitry is configured to execute a secure write operation in the memory array in response to receiving encrypted information. The encrypted information includes at least one of information of data to be written, an option code, or multiple addresses in the memory array, the option code specifying a way of writing the data on at least one of the multiple addresses in the memory array.