Security Enclave Processor Isolation in System on Chip
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the complexity and functionality of Systems on a Chip (SOCs) increase, ensuring the security and resistance to attacks on secure data becomes a significant challenge, particularly in portable devices used for financial transactions and data storage, where existing technologies lack effective isolation and control mechanisms for secure data processing.
Innovation Solution
Implementing a Security Enclave Processor (SEP) within the SOC, which is isolated from other components, manages cryptographic keys, controls boot processes, and handles power management independently, using secure read-only memory and strict access controls to prevent unauthorized access and tampering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Security Enclave Processor (SEP) is implemented within the SOC to isolate sensitive operations, then security and resistance to attacks are improved, but device complexity increases
Solution Approach 1:
The patent divides the SOC into distinct functional segments: the main application processor and the separate Security Enclave Processor (SEP). The SEP is further segmented into isolated functional units including cryptographic hardware, secure ROM, trust zone memory, and power management components. This segmentation allows each component to operate independently with defined access controls, enhancing security while maintaining manageable complexity through modular architecture.
Solution Approach 2:
The patent implements a nested architecture where the SEP is embedded within the SOC structure, creating an SOC-within-an-SOC configuration. The SEP contains nested security layers including trust zones within the SEP, secure memory regions within the trust zones, and cryptographic modules within the secure regions. This nested doll approach provides multiple levels of security isolation, where each nested layer protects sensitive operations while the overall structure remains integrated within the parent SOC.
2Reliability
If the SEP is isolated from other components with strict access controls, then security is improved, but ease of operation deteriorates
Solution Approach 1:
The patent introduces intermediary mechanisms to facilitate controlled communication between the isolated SEP and other SOC components. These intermediaries include mailbox registers for message passing, trust zone attributes for memory access control, and defined interface protocols. The intermediaries act as mediators that enforce security policies while enabling necessary operations, allowing the SEP to remain isolated yet still interact with the rest of the system through controlled channels.
Solution Approach 2:
The patent designs the SEP with multi-functional capabilities that reduce the need for multiple separate components. The SEP simultaneously performs cryptographic operations, secure key management, trust zone enforcement, power management, and boot control functions. This universal approach consolidates multiple security-related functions into a single isolated processor, maintaining security through isolation while improving ease of operation by reducing the number of interfaces and interactions needed.
3Reliability
If the SEP controls its own power management independently, then security is improved, but device complexity increases
Solution Approach 1:
The patent implements self-service power management where the SEP autonomously controls its own power state transitions. The SEP includes internal power management logic that can independently enter low-power states, manage its own clock gating, and control power to its internal components without requiring external intervention. This self-service approach enhances security by preventing external entities from forcing the SEP into unwanted states, while the modular power management design keeps complexity manageable through clear separation of concerns.
Data Source
AI summary
An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory.


