Hardware Security Module Key Rotation for Fault-Resistant Microprocessors
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Solution Overview
Problem
Existing microprocessors are vulnerable to fault injection attacks that compromise their security by altering machine instructions, data, or control flow, with the secret key used in integrity code calculation being easily determinable, compromising the security of hardware circuits.
Innovation Solution
A microprocessor architecture with a hardware security module that includes a hardware computing circuit to calculate integrity codes using a secret key, changing the key frequently and using multiple auxiliary register banks to secure the execution of instructions, thereby preventing unauthorized modification of integrity codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the secret key α is used in the function Qα to calculate integrity codes, then the calculation is fast and simple, but the secret key can be easily determined once several pairs (Di, Qα(Di)) are known, compromising security
Solution Approach 1:
The patent applies dynamics by making the secret key change over time. Instead of using a static secret key α in the function Qα, the system uses a time-varying secret key that is updated periodically. This is achieved through a key management unit that generates new keys and a control unit that coordinates key changes. The function becomes Qα(t)(Di) where α(t) changes with time, maintaining security while preserving calculation speed through hardware implementation.
Solution Approach 2:
The patent applies preliminary action by pre-calculating and storing integrity codes in auxiliary register banks before they are needed for verification. The system maintains multiple auxiliary register banks (ARB1, ARB2) that are pre-filled with integrity codes corresponding to different secret key states. This allows the system to switch between keys without recalculating integrity codes on-demand, maintaining both security through key changes and performance through pre-computation.
2Reliability
If the secret key is changed frequently to improve security, then security is enhanced, but the execution speed of machine code may be slowed down
Solution Approach 1:
The patent applies preliminary action by pre-calculating integrity codes for multiple secret key states and storing them in auxiliary register banks before key transitions occur. The control unit manages this by tracking which registers have been updated with new key-based integrity codes. When a key change is needed, the system can immediately use the pre-computed codes from the auxiliary banks without pausing instruction execution, thus maintaining high performance while achieving frequent key changes for security.
Solution Approach 2:
The patent applies continuity of useful action by ensuring that integrity code calculation and verification operations continue uninterrupted during secret key changes. The hardware security module performs these operations in parallel with the main processor execution. The control unit coordinates key changes to occur during natural instruction boundaries or uses pre-computed codes to maintain continuous verification without stalling the instruction pipeline, thus preserving execution speed while implementing frequent key rotation.
Data Source
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Figure 3
AI summary
The hardware security module (28) is configured to: - when data Di is written into a register Ri,0 of the microprocessor: - calculate a code Ci,α2 using a function Qα2 parameterized by a secret key α2, then - store the code Ci,α2 in a register of an auxiliary bank and mark this register as having been updated, - only when all the registers of the auxiliary bank have been marked, trigger, at a time tr1, the replacement of a current secret key α1 by the key α2 and, for any new arithmetic and logic instruction whose execution begins after this time tr1, the use of the key α2 and the codes Ci,α2 stored in the auxiliary register bank in place, respectively, of the key α1 and codes Ci,α1, to calculate and verify a Crest-t code.