Seed Layer Phase Control for Low-Temperature Ferroelectric Memory

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Solution Overview

Problem

Existing methods for forming ferroelectric materials in FeRAM devices require high annealing temperatures, which can damage metal lines and vias, leading to degraded polarization performance.

Innovation Solution

The use of a seed layer with a well-controlled crystal phase allows for the formation of ferroelectric layers at lower annealing temperatures, maintaining the integrity of metal lines and vias while improving ferroelectric performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high annealing temperatures are used to form ferroelectric materials, then ferroelectric performance is improved, but metal lines and vias are damaged

Engineering Contradiction:
Improveferroelectric performanceVSAvoiddamage to metal lines and vias
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A seed layer is introduced as an intermediary between the metal electrode and the ferroelectric layer. This seed layer has a crystal structure that templates the ferroelectric phase formation, enabling the ferroelectric layer to form at lower annealing temperatures that do not damage the underlying metal lines and vias, thus resolving the contradiction between achieving good ferroelectric performance and protecting metal structures from thermal damage

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The seed layer is formed in advance before depositing the ferroelectric layer. This preliminary action creates a prepared crystalline template that guides the subsequent ferroelectric material formation process, allowing the system to achieve desired ferroelectric properties at reduced temperatures that protect the metal interconnects from damage

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If lower annealing temperatures are used to protect metal lines and vias, then metal integrity is maintained, but ferroelectric performance deteriorates

Engineering Contradiction:
Improveintegrity of metal lines and viasVSAvoidferroelectric performance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The seed layer acts as a thermal buffer and crystal template, mediating between the low-temperature processing requirement for metal protection and the high-temperature requirement for ferroelectric performance. Its specific crystal structure enables ferroelectric phase formation at lower temperatures than would otherwise be required, maintaining both metal integrity and ferroelectric functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The introduction of the seed layer changes the crystallization temperature parameter for ferroelectric material formation. By providing a pre-formed crystal template, the system can achieve ferroelectric phase transformation at lower temperatures, thus protecting metal lines while still obtaining acceptable ferroelectric performance

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the manufacture of FeRAM devices with improved ferroelectricity performance while protecting the integrity of metal lines and vias, allowing for efficient data storage and retrieval.

Implementation Method 1

performing a first surface treatment on the first seed layer to convert a crystal phase of the first seed layer

Methodology Applied
Scientific EffectCrystal phase transformation: Phase Change

Implementation Method 2

performing a thermal operation on the dielectric layer subsequent to the first surface treatment to thereby convert the dielectric layer into a ferroelectric layer

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS20250191912A1Seed layer for ferroelectric memory device and manufacturing method thereof
Publication Date: 2025.06.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250191912A1 patent drawing
  • US20250191912A1 patent drawing
  • US20250191912A1 patent drawing

AI summary

A method includes: forming a bottom electrode over a substrate; depositing a first seed layer over the bottom electrode; performing a first surface treatment on the first seed layer to convert a crystal phase of the first seed layer; depositing a dielectric layer over the bottom electrode adjacent to the first seed layer; depositing an upper layer over the dielectric layer; and performing a thermal operation on the dielectric layer subsequent to the first surface treatment to thereby convert the dielectric layer into a ferroelectric layer.