SEED Encryption Masking F-Function Inversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional masking methods for SEED encryption systems require repeated conversions of arithmetic operation mask values to logical operation mask values, complicating the process and reducing efficiency in preventing power/electromagnetic wave side-channel analysis attacks.
Innovation Solution
Designing a masking F-function that converts logical operation mask values into arithmetic operation mask values using a new masked S-box table, eliminating the need for converting 232 modular addition mask values into XOR mask values, thereby simplifying the masking process and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional masking methods are used to prevent side-channel analysis attacks, then security against power/electromagnetic wave analysis is improved, but the complexity of the masking process increases due to repeated conversions between arithmetic and logical operation mask values
Solution Approach 1:
The patent inverts the conventional masking approach by designing the F-function to operate directly with arithmetic operation mask values (modular addition masks) instead of requiring conversion to logical operation mask values (XOR masks). This inversion eliminates the repeated conversion steps between arithmetic and logical masks, reducing process complexity while maintaining security against side-channel analysis attacks.
Solution Approach 2:
The patent changes the parameter type used in masking operations from logical operation masks to arithmetic operation masks. By modifying the F-function to accept and process arithmetic masks directly, the system eliminates the need for mask value conversions, thereby simplifying the masking process while preserving cryptographic security.
2Reliability
If conventional masking methods with repeated mask value conversions are used, then security against side-channel analysis is improved, but the processing time and operational efficiency deteriorate
Solution Approach 1:
The patent inverts the conventional masking approach by designing the F-function to operate directly with arithmetic operation mask values (modular addition masks) instead of requiring conversion to logical operation mask values (XOR masks). This inversion eliminates the repeated conversion steps between arithmetic and logical masks, reducing process complexity while maintaining security against side-channel analysis attacks.
Solution Approach 2:
The patent enables continuous processing by eliminating the interruptive conversion steps between different mask types. The F-function can now process arithmetic masks continuously without pausing for conversions to logical masks and back, thereby improving processing efficiency and throughput while maintaining security.
3Reliability
If arithmetic operation mask values are converted to logical operation mask values multiple times, then security masking is maintained, but the number of operational steps increases
Solution Approach 1:
The patent inverts the conventional masking approach by designing the F-function to operate directly with arithmetic operation mask values (modular addition masks) instead of requiring conversion to logical operation mask values (XOR masks). This inversion eliminates the repeated conversion steps between arithmetic and logical masks, reducing process complexity while maintaining security against side-channel analysis attacks.
Solution Approach 2:
The patent extracts and removes the unnecessary mask conversion steps from the F-function processing pipeline. By eliminating the conversion procedures between arithmetic and logical masks, the system reduces the number of operational steps and time loss while maintaining the essential security masking function through direct arithmetic mask processing.
Data Source
AI summary
An apparatus for processing an F-function in a SEED encryption system includes: an arithmetic operation masking conversion unit for converting a logical operation mask value obtained by performing a logical operation of a SEED F-function input value and a random mask value into an arithmetic operation mask value; and a masking G-function unit for taking the arithmetic operation mask value from the arithmetic operation masking conversion unit as an input and producing an arithmetic operation output.


