3D Cross-Bar Nonvolatile Memory via Seed Wafer Transfer

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Solution Overview

Problem

Conventional methods for forming 3D cross-bar nonvolatile memory require high thermal budgets, which can damage underlying layers and limit the integration of crystalline JLFETs within a low thermal budget.

Innovation Solution

The method involves transferring doped crystalline semiconductor layers from a seed wafer to form source, drain, and channel regions of junctionless FETs, eliminating the need for high-temperature annealing and allowing low-temperature processing, enabling the formation of 3D cross-bar nonvolatile memory arrays with higher storage density and smaller footprints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional methods are used to form 3D cross-bar nonvolatile memory, then crystalline JLFETs can be formed, but high thermal budgets are required which damage underlying layers

Engineering Contradiction:

Improvecrystalline JLFET formationVSAvoidthermal damage to underlying layers

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-doping the crystalline semiconductor layer with dopant atoms before transferring it to the substrate. This preliminary doping eliminates the need for subsequent high-temperature annealing steps that would otherwise be required to activate the dopants, thereby avoiding thermal damage to underlying layers while still achieving functional crystalline JLFETs.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses a seed wafer as an intermediary carrier to grow and pre-dope the crystalline semiconductor layer before transferring it to the final substrate. This intermediary approach allows the dopant atoms to be incorporated during the crystal growth phase on the seed wafer, avoiding the need for high-temperature processing on the final device structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Manufacturing precision

If high-temperature annealing is used to form crystalline JLFETs, then proper doping is achieved, but the thermal budget is exceeded limiting integration

Engineering Contradiction:

Improvedoping precisionVSAvoidintegration complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The doping process is performed preliminarily during the crystal growth stage on the seed wafer, before the crystalline layer is transferred to the final substrate. This preliminary doping achieves precise dopant incorporation without requiring subsequent high-temperature annealing steps, thereby reducing the overall thermal budget and simplifying the integration process with other device layers.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11532705B23D cross-bar nonvolatile memory

Publication Date: 2022.12.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Semiconductor structures and methods for crystalline junctionless transistors used in nonvolatile memory arrays are introduced. Various embodiments in accordance with this disclosure provide a method of fabricating a monolithic 3D cross-bar nonvolatile memory array with low thermal budget. The method incorporates crystalline junctionless transistors into nonvolatile memory structures by transferring a layer of doped crystalline semiconductor material from a seed wafer to form the source, drain, and connecting channel of the junctionless transistor.