Seeding Bias Control for NAND Sub-Block Groups
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Solution Overview
Problem
In memory devices, particularly non-volatile memory devices like NAND, the programming disturbance effect causes charge retention issues due to residue electrons, leading to incorrect data reading and increased power consumption, as existing methods to control seeding bias fail to effectively manage power consumption and reduce disturb effects across sub-blocks.
Innovation Solution
Implementing a seeding scheme that controls the seeding bias level by segmenting wordlines into distinct segments, applying different bias voltages to each segment, and determining whether to enable or skip the seeding operation based on threshold voltage conditions, thereby managing current flow and reducing programming disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If seeding bias is applied to all sub-blocks during programming operation, then programming disturbance effect is reduced, but power consumption increases
Solution Approach 1:
The memory device segments wordlines into first wordline segments and second wordline segments, dividing the memory array into first sub-blocks and second sub-blocks. This segmentation allows selective application of seeding bias to only those sub-blocks that require it, rather than applying it uniformly across all sub-blocks, thereby reducing overall power consumption while maintaining disturbance reduction where needed.
Solution Approach 2:
The patent applies different bias voltages to different wordline segments based on their specific requirements. First wordline segments receive a first bias voltage while second wordline segments receive a second bias voltage, allowing localized optimization of seeding bias application only where programming disturbance is likely to occur, rather than uniformly across the entire memory array.
2Reliability
If seeding operation is enabled for all sub-blocks, then charge retention issues are reduced, but peak power consumption increases
Solution Approach 1:
The patent dynamically controls the seeding operation by enabling it only for specific sub-blocks based on their threshold voltage conditions. The control logic adjusts the seeding bias application in real-time based on the operational state of different sub-blocks, allowing the system to adaptively manage power consumption while maintaining effective charge retention control where needed.
3Device complexity
If uniform bias voltage is applied to all wordlines, then control complexity is reduced, but programming disturbance effect increases
Solution Approach 1:
The patent divides wordlines into multiple segments (first wordline segments and second wordline segments) that can be controlled independently. This segmentation increases control complexity slightly but enables selective bias application that significantly reduces programming disturbance effects, particularly for sub-blocks with lower threshold voltages that are more susceptible to disturbance.
Solution Approach 2:
Different bias voltages are applied to different wordline segments based on their specific operational requirements. This localized approach allows the system to reduce programming disturbance effects in vulnerable sub-blocks while maintaining simpler control for other areas, achieving a balance between control complexity and disturbance reduction effectiveness.
Data Source
AI summary
Control logic in a memory device initiates a program operation to program one or more memory cells of a first sub-block of a memory array, the program operation including a seeding phase. During the seeding phase, a first wordline voltage is caused to be applied to a first wordline segment associated with a first portion of the memory array. During the seeding phase, a second wordline voltage is caused to be applied to a second wordline segment associated with a second portion of the memory array, where the first wordline voltage and the second wordline voltage cause a seeding bias voltage to be applied to the first sub-block group and inhibit application of the seeding bias voltage to the second sub-block group.