Single-Crystal Silicon Stud for MRAM via Selective Epitaxial Growth
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Solution Overview
Problem
Current magnetoresistive random access memory (MRAM) devices face challenges in achieving uniform crystalline structure and electrical properties due to polycrystalline MTJ layers deposited directly on metallic vias, leading to random crystalline orientations and varying properties across memory cells.
Innovation Solution
The method involves forming a magnetoresistive random access memory (MRAM) device using selective epitaxial growth (SEG) to create a single-crystal silicon stud on a uniform crystalline substrate, allowing for heteroepitaxial deposition of magnetic tunnel junction (MTJ) layers with a single-crystal seed, ensuring uniform crystal orientation and improved electrical and magnetic properties across all memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polycrystalline MTJ layers are deposited directly on metallic vias, then the manufacturing process is simplified, but the crystalline structure uniformity and electrical properties deteriorate due to random crystalline orientations
Solution Approach 1:
A single-crystal silicon stud is introduced as an intermediary substrate between the metallic via and the MTJ layers. This intermediary provides a uniform crystalline template that guides the growth of epitaxial silicon layers, ensuring consistent crystal orientation throughout the MTJ stack while maintaining compatibility with standard fabrication processes
Solution Approach 2:
The single-crystal silicon stud is formed in advance before depositing the MTJ layers. This preliminary action establishes a uniform crystalline foundation that determines the crystal orientation of subsequent epitaxial layers, preventing random orientations that would occur with direct deposition on polycrystalline substrates
2Device complexity
If MTJ layers are deposited on polycrystalline substrates, then the device complexity is reduced, but the electrical and magnetic properties vary across memory cells due to random crystalline orientations
Solution Approach 1:
The patent employs homogeneous single-crystal silicon material for the stud and epitaxial layers, ensuring uniform crystal structure and orientation throughout. This homogeneity eliminates the variability introduced by polycrystalline grain boundaries and random orientations, resulting in consistent electrical and magnetic properties across all memory cells
Solution Approach 2:
The single-crystal silicon stud acts as a mediator that transfers the uniform crystalline structure to the MTJ layers through heteroepitaxial growth. This intermediary ensures that all memory cells experience the same crystalline environment, improving reliability by eliminating variations caused by substrate inconsistencies
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in MRAM devices with consistent crystal orientation and enhanced electrical and magnetic properties, improving the reliability and performance of memory cells by ensuring all memory cells have the same crystal orientation, thus addressing the variability in existing technologies.
Implementation Method 1
A polycrystalline material is disposed in the hole by using selective epitaxial growth (SEG), where the polycrystalline material is annealed to create an epitaxial stud
Implementation Method 2
the polycrystalline material is annealed to create an epitaxial stud
Implementation Method 3
allowing for heteroepitaxial deposition of magnetic tunnel junction (MTJ) layers with a single-crystal seed, ensuring uniform crystal orientation
Data Source
AI summary
A technique relates magnetoresistive random access memory (MRAM). A dielectric layer is disposed on a transistor, and the transistor is formed in a uniform crystalline substrate. A hole is formed through the dielectric layer to reach the transistor. A polycrystalline material is disposed in the hole by using selective epitaxial growth (SEG), and the polycrystalline material is annealed to create an epitaxial stud. A magnetic tunnel junction (MTJ) is disposed on the epitaxial stud (SEG).


