Selective Epitaxial Growth for Uniform Semiconductor Layers
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Solution Overview
Problem
The challenge lies in growing a thin single crystalline semiconductor layer uniformly without defects, particularly at sidewall surfaces, during the epitaxial growth process for semiconductor devices, as existing methods often result in crystal facets that lead to defects.
Innovation Solution
A selective epitaxial growth (SEG) process is employed, where a substrate with a blocking pattern is used to expose only the upper surface for growth, and temperature control is alternated between two temperatures to prevent atom migration and facet formation, ensuring all outer surfaces of the semiconductor layer have uniform crystallographic orientations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a thin single crystalline semiconductor layer is grown by conventional epitaxial growth process, then the layer can be formed on the substrate, but crystal facets appear on sidewall surfaces causing defects
Solution Approach 1:
The patent applies periodic temperature cycling during the epitaxial growth process, alternating between a first temperature (preventing atom migration) and a second temperature (promoting atomic rearrangement). This periodic action occurs in multiple cycles, where each cycle consists of a first time period at the first temperature followed by a second time period at the second temperature. This periodic temperature variation prevents crystal facet formation on sidewall surfaces while maintaining uniform thin layer growth, thereby resolving the contradiction between manufacturing precision and reliability.
2Stability of the object's composition
If temperature is continuously high during epitaxial growth, then atomic rearrangement occurs for crystal formation, but atom migration causes facet defects
Solution Approach 1:
The patent employs periodic temperature cycling between a first temperature (lower, preventing atom migration and maintaining sidewall uniformity) and a second temperature (higher, promoting atomic rearrangement for crystal formation). Each cycle includes a first time period at the first temperature followed by a second time period at the second temperature. This periodic action allows the system to alternately prevent migration and promote crystallization, achieving both stable crystal structure formation and sidewall surface uniformity without continuous high temperature.
3Ease of operation
If the epitaxial growth process is performed at one constant temperature, then the process is simple to control, but it is difficult to prevent facet defects on sidewalls
Solution Approach 1:
The patent implements periodic temperature cycling between a first temperature and a second temperature, where each cycle consists of a first time period at the first temperature followed by a second time period at the second temperature. This periodic temperature variation occurs multiple times during the epitaxial growth process. While this approach increases operational complexity compared to constant temperature control, it dramatically improves sidewall surface quality by preventing atom migration during the first temperature phase and promoting crystal formation during the second temperature phase, thereby achieving high manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents facet defects in the semiconductor layer, resulting in a uniform single crystalline semiconductor layer with all surfaces having the same crystallographic orientation, enhancing the integration and performance of semiconductor devices.
Implementation Method 1
forming a thin layer on the exposed part of the surface of the substrate such that all outer surfaces of the layer have <100> crystallographic orientations, respectively. The thin layer is formed by a selective epitaxial growth (SEG) process
Implementation Method 2
effecting a temperature control over at least one cycle of a first time period and a second time period that follows the first time period chronologically, and characterized in that the duration of the second time period is shorter than that of the first time period, the temperature of the substrate is maintained at one temperature throughout the entire duration of the first time period, and the temperature of the substrate is raised from said one temperature to a second temperature during the course of the second time period
Data Source
AI summary
A thin layer structure includes a substrate, a blocking pattern that exposes part of an upper surface of the substrate, and a single crystalline semiconductor layer on the part of the upper surface of the substrate exposed by the pattern and in which all outer surfaces of the single crystalline semiconductor layer have a <100> crystallographic orientation. The thin layer structure is formed by an SEG process in which the temperature is controlled to prevent migration of atoms in directions towards the central portion of the upper surface of the substrate. Thus, sidewall surfaces of the layer will not be constituted by facets.