Segmented Array Code Execution Across Multi-Subunit Processors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods fail to efficiently identify and exploit the full parallel potential of array instructions in user programs, leading to increased execution times and power consumption due to inefficient resource management and incomplete data-dependency handling.

Innovation Solution

A computer-implemented method generates segmented program code that executes array operations asynchronously or synchronously based on runtime input configuration, optimizing resource utilization and data dependencies across multiple sub-units of a processing unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If program segments are executed asynchronously to hide memory copy latencies, then execution time is reduced, but power consumption and latency for handling hardware resources increase

Engineering Contradiction:
Improveexecution timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts execution mode between synchronous and asynchronous based on runtime conditions. The segmented program code can switch between synchronous execution (when hardware resources are unavailable or configuration is incomplete) and asynchronous execution (when resources are available and configuration is complete), optimizing the trade-off between execution time and power consumption.

Inventive Principle:
Principle #15Dynamics

2Reliability

If resource management is performed from the host subunit/main thread, then memory allocation is centralized, but memory utilization increases due to inefficient allocation schemes

Engineering Contradiction:
Improvememory management consistencyVSAvoidmemory utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system segments resource management responsibilities across multiple sub-units. Each sub-unit can independently manage its own memory allocation and configuration, reducing the memory footprint on the host sub-unit and improving overall memory utilization efficiency while maintaining consistency through coordinated configuration updates.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If conditional expressions are present in array instructions, then program logic flexibility is improved, but segment chain interruptions occur forcing sequential execution

Engineering Contradiction:
Improveprogram logic flexibilityVSAvoidcompute resource utilization
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system performs preliminary analysis of array instructions to identify those that can be safely segmented without conditional expressions. By pre-filtering and preparing segmentable instructions, the system maximizes parallel execution opportunities while maintaining the flexibility to handle conditional logic where necessary, thus improving overall compute resource utilization.

Inventive Principle:
Principle #10Preliminary action

4Ease of manufacture

If existing methods are used for automatic adaptation, then compiler-based optimization is applied, but full parallel potential of array instructions is not identified

Engineering Contradiction:
Improvecompiler optimizationVSAvoidparallel execution efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The system replaces traditional compiler-based static optimization with a runtime-execution model. The segmented program code is generated and executed dynamically, allowing the system to identify and exploit parallel potential at runtime rather than relying solely on compiler analysis, thereby achieving higher parallel execution efficiency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20250370768A1A computer-implemented method and a computer-readable medium
Publication Date: 2025.12.04 ILNUMERICS GMBH
  • US20250370768A1 patent drawing
  • US20250370768A1 patent drawing
  • US20250370768A1 patent drawing

AI summary

A computer-implemented method and computer readable medium is disclosed. In one example, the method includes receiving a user program code; and generating, from the user program code, a segmented program code executable on a processing unit comprising several sub-units. The segmented program code comprises program segments. Each of the program segments being configured to receive, as a respective runtime input, a partially configured runtime instance of a respective array data structure, and to use information from the respective partially configured runtime instance. The method includes executing the segmented program code on a first sub-unit of the processing unit, and, when a configuration of the runtime instance is complete and/or updated, completing configuration of the respective executable code, when the respective executable code is only partially configured, and executing the respective executable code on the processing unit.