Segmented Bit Line Charging for Memory Read Power Reduction
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Solution Overview
Problem
Existing memory devices consume significant power during read operations due to the need to charge all bit lines, which is time-consuming and power-intensive.
Innovation Solution
The memory device incorporates a chip design where bit lines are divided into two portions electrically connected via a transistor, allowing only one portion to be charged during partial data read operations and both portions to be charged for full data access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all bit lines are charged during read operations, then complete data access is enabled, but power consumption increases significantly
Solution Approach 1:
The bit lines are divided into two separate portions (first portion and second portion) that can be independently charged. This segmentation allows the system to charge only the necessary portion for partial reads, reducing power consumption while maintaining complete data access capability when both portions are charged.
Solution Approach 2:
The patent implements partial charging action by enabling the option to charge only one portion of the bit lines when only partial data is needed. This partial action reduces power consumption compared to charging all bit lines, while still providing sufficient data access for the requested information.
2Reliability
If all bit lines are charged during read operations, then full data can be accessed, but the operation becomes time-consuming
Solution Approach 1:
Dividing bit lines into separate portions enables selective charging operations. When only partial data is required, only the relevant portion needs to be charged, significantly reducing the time required compared to charging all bit lines regardless of data needs.
Solution Approach 2:
The system performs partial charging actions based on data requirements. By charging only one portion when sufficient for the read operation, the time loss is minimized while maintaining the ability to charge both portions when complete data access is required.
3Use of energy by moving object
If bit lines are divided into two portions with independent charging capability, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The bit lines are segmented into first and second portions with independent charging paths. This segmentation structure, while adding complexity, enables the power consumption reduction by allowing selective charging of only the necessary portion based on data access requirements.
4Use of energy by moving object
If only one portion of bit lines is charged, then power consumption is reduced, but access to certain data becomes limited
Solution Approach 1:
The segmented bit line structure with first and second portions provides adaptability by allowing the system to select which portion to charge based on the specific data access requirements. This maintains versatility while enabling power reduction when full access is not needed.
Solution Approach 2:
The system dynamically adjusts the charging operation based on data requirements. The controller can selectively charge one or both portions of the bit lines, providing dynamic adaptability between power-saving mode and full-access mode depending on the read operation needs.
Data Source
AI summary
The memory device includes a chip with circuitry, a plurality of memory blocks, and a plurality of bit lines. The memory blocks include an array of memory cells, and the circuitry either overlies or underlies the array of memory cells. The bit lines are divided into two portions that are electrically connected with one another via at least one transistor so that at least one portion of each bit line can be charged independently of the other portion of the same bit line.