Segmented Bitline Programming for Two-Terminal Memory Cells

Solution Overview

Problem

Existing resistive memory technologies face challenges with high sneak path currents in larger memory block sizes, leading to increased power consumption, reduced sensing margin, and potential memory errors, especially at advanced nanometer technology nodes.

Innovation Solution

The approach involves programming two-terminal memory cells by applying a program signal to a local wordline and grounding or applying a negative signal to a bitline, reducing sneak path currents by minimizing the number of leakage paths and reducing current supply requirements, thereby enabling larger memory arrays with increased memory density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory array size is increased to improve memory density, then memory capacity increases, but sneak path currents increase leading to higher power consumption and reduced reliability

Engineering Contradiction:

Improvememory densityVSAvoidpower consumption

Core Design Contradiction:

Quantity of substanceVSLoss of energy

Solution Approach 1:

The bitline is divided into multiple segmented bitline portions, each associated with a different voltage level. This segmentation allows independent voltage control of different bitline segments, enabling the memory system to reduce sneak path currents by applying appropriate voltage levels to specific segments during programming operations, thereby reducing overall power consumption in large memory arrays.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the voltage parameter of bitlines by introducing multiple voltage levels (first voltage level, second voltage level, third voltage level) for different bitline portions. By dynamically adjusting voltage levels based on programming needs, the system reduces sneak path currents and power consumption while maintaining memory density.

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If memory array size is increased to improve memory density, then memory capacity increases, but sneak path currents increase leading to reduced sensing margin and potential errors

Engineering Contradiction:

Improvememory densityVSAvoidsensing margin

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The bitline is divided into multiple segmented bitline portions, each associated with a different voltage level. This segmentation allows independent voltage control of different bitline segments, enabling the memory system to reduce sneak path currents by applying appropriate voltage levels to specific segments during programming operations, thereby reducing overall power consumption in large memory arrays.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the voltage parameter of bitlines by introducing multiple voltage levels (first voltage level, second voltage level, third voltage level) for different bitline portions. By dynamically adjusting voltage levels based on programming needs, the system reduces sneak path currents and power consumption while maintaining memory density.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If conventional programming methods are used to program memory cells, then programming is achieved, but high sneak path currents are generated increasing power consumption

Engineering Contradiction:

Improveprogramming capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The bitline is divided into multiple segmented bitline portions, each associated with a different voltage level. This segmentation allows independent voltage control of different bitline segments, enabling the memory system to reduce sneak path currents by applying appropriate voltage levels to specific segments during programming operations, thereby reducing overall power consumption in large memory arrays.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the voltage parameter of bitlines by introducing multiple voltage levels (first voltage level, second voltage level, third voltage level) for different bitline portions. By dynamically adjusting voltage levels based on programming needs, the system reduces sneak path currents and power consumption while maintaining memory density.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9627057B2Programming two-terminal memory cells with reduced program current

Publication Date: 2017.04.18 CROSSBAR INC

AI summary

Providing for programming a two-terminal memory cell array with low sneak path current is described herein. Groups of two-terminal memory cells can be arranged into blocks or sub-blocks, along sets of bitlines and local wordlines. Further, groups of local wordlines within a given sub-block can be electrically isolated from bitlines outside the sub-block. A programming signal can be applied to the two-terminal memory cells from an associated local wordline thereof. Sneak path currents can be mitigated or avoided with respect to bitlines outside a particular sub-block, or on non-selected wordlines of the sub-block. This can significantly reduce a magnitude of combined sneak path current within the sub-block in response to the programming operation.