Segmented Bitscan for Flash Memory Error Tolerance

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Solution Overview

Problem

Conventional flash memory systems face challenges in tolerating a high number of error bits during programming and erasing operations, as existing error correction codes can only correct a limited number of errors across a page, leading to incomplete programming or erasing processes.

Innovation Solution

The system groups data into overlapping zones, allowing for more error bits to be tolerated by determining if each zone has fewer error bits than the maximum correctable limit, and adjusting the programming process accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional error correction codes are used to correct errors during programming, then the number of correctable errors is limited, but the programming process cannot tolerate a high number of error bits

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtolerance for error bits
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent divides the data into multiple zones (first zone, second zone, third zone) with different error correction capabilities. Each zone can tolerate a different number of errors, allowing the system to handle a higher overall number of error bits by distributing them across zones with varying tolerance levels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different zones are assigned different error correction characteristics. The first zone has a first maximum number of tolerable errors, the second zone has a second maximum number, and the third zone has a third maximum number. This local differentiation allows the system to optimize error tolerance for different parts of the data.

Inventive Principle:
Principle #3Local quality

2Reliability

If the programming process continues until all error bits are corrected, then data integrity is improved, but the programming time and energy consumption increase

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent allows the programming process to conclude when each zone has fewer errors than its respective maximum tolerable limit, rather than requiring complete correction of all errors. This partial action approach maintains sufficient data integrity while reducing the time and energy required for programming.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system continuously monitors the number of errors in each zone during programming and uses this feedback to determine when to conclude the process. When each zone falls below its error threshold, the system can safely stop, optimizing the balance between data integrity and programming efficiency.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If overlapping zones are used to increase error tolerance, then more error bits can be tolerated, but the complexity of verifying and managing error correction increases

Engineering Contradiction:
Improveerror bit toleranceVSAvoidverification process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The data is segmented into distinct zones (first, second, and third zones) with clearly defined error tolerance limits. This segmentation simplifies the verification process by allowing the system to independently count and manage errors in each zone rather than dealing with a single complex error correction structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent defines specific maximum numbers of tolerable errors for each zone (first maximum, second maximum, third maximum). By establishing these partial thresholds rather than requiring complete error correction, the verification process becomes simpler and more manageable while still providing robust error tolerance.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8400836B2Segmented bitscan for verification of programming
Publication Date: 2013.03.19 SANDISK TECHNOLOGIES LLC
  • US8400836B2 patent drawing
  • US8400836B2 patent drawing
  • US8400836B2 patent drawing

AI summary

A set non-volatile storage elements are subjected to a programming process in order to store a set of data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target condition to store the appropriate data. Decisions about whether to continue programming or whether the programming is successful are made based on whether overlapping groups of the non-volatile storage elements have less than a threshold number of non-volatile storage elements that are not properly programmed.