Segmented Bottom Electrodes for High-Aspect-Ratio Capacitors

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Solution Overview

Problem

Current semiconductor memory devices face challenges in increasing integration and performance while maintaining reliability, particularly in enhancing the capacity of capacitors, which is crucial for meeting the demands of modern electronic devices.

Innovation Solution

A method of fabricating semiconductor devices involves forming a mold structure with specific layers and performing anisotropic etching to create through holes for forming bottom electrodes with a unique segmented structure, including a buffer layer with varying nitrogen and oxygen content to prevent over-etching and ensure adequate spacing between electrodes, thereby improving reliability and capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the aspect ratio of the bottom electrode is increased to enhance capacitor capacity, then the reliability of the semiconductor memory device is improved, but the manufacturing precision and control of electrode spacing become more difficult

Engineering Contradiction:
Improvereliability of semiconductor memory deviceVSAvoidspacing control between electrodes
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The bottom electrode is divided into multiple segments along its sidewall, creating a stepped or terraced structure. This segmentation allows each segment to be independently formed and controlled, enabling precise spacing between adjacent electrodes while maintaining the required aspect ratio for high capacitance. The segmented structure prevents direct contact between adjacent electrodes, ensuring proper isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a simple cylindrical electrode structure to a multi-dimensional segmented structure by adding radial divisions to the sidewall. This dimensional change creates multiple surfaces and edges that can be selectively etched and isolated, providing additional control over electrode spacing and positioning in the horizontal plane while maintaining vertical height for capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the integration of semiconductor memory devices is increased to meet device capacity demands, then the performance is improved, but the reliability and spacing between components deteriorate

Engineering Contradiction:
Improveintegration of semiconductor memory deviceVSAvoidspacing between components
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By segmenting the bottom electrode structure, the invention enables better spatial organization and isolation of adjacent components. The segmented sidewalls create natural separation zones that maintain adequate spacing between closely packed electrodes, allowing higher integration density without compromising reliability through improper contact or interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The segmented structure applies different properties to different regions of the electrode - the top surface maintains continuity for electrical connection, while the sidewalls are divided into segments for isolation. This local differentiation allows the electrode to simultaneously achieve good electrical connectivity and proper spatial separation, supporting high integration while maintaining reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach enhances the reliability and capacity of semiconductor devices by preventing electrical interference and ensuring proper spacing between electrodes, leading to improved performance and integration in electronic devices.

Implementation Method 1

performing an anisotropic etching process on the mold structure to form a plurality of through holes in the mold structure

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS11749536B2Semiconductor device and method of fabricating the same
Publication Date: 2023.09.05 SAMSUNG ELECTRONICS CO LTD
  • US11749536B2 patent drawing
  • US11749536B2 patent drawing
  • US11749536B2 patent drawing

AI summary

A method of fabricating a semiconductor may include forming on a substrate a mold structure including a mold layer, a buffer layer, and a support layer, performing on the mold structure an anisotropic etching process to form a plurality of through holes in the mold structure, and forming a plurality of bottom electrodes in the through holes. The buffer layer has a nitrogen content amount that increases as approaching the support layer from the mold layer. The buffer layer has an oxygen content amount that increases as approaching the mold layer from the support layer.