Segmented Buffer Data Supply for Image Processing Memory Reduction

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Solution Overview

Problem

Existing image processing apparatus require large line memories and increased circuit size due to the need for multiple line memories and complex address calculations for filtering operations, especially with larger filter sizes and higher resolutions.

Innovation Solution

A data supply method that uses intermediate storage units with a capacity smaller than a line of unprocessed image data, where unit data is input and output sequentially from one end of each buffer, and data shifting occurs after each arithmetic processing, reducing the need for large line memories and circuit size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple line memories are used to store data for filtering operations, then image processing capability is improved, but device complexity and memory capacity requirements increase

Engineering Contradiction:
Improveimage processing capabilityVSAvoidnumber of line memories
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the line memory into multiple segment memories, each storing data for a specific segment of the image line. This segmentation allows the system to process only the necessary portion of data for current filtering operations, reducing the total memory capacity required while maintaining filtering capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic address calculation where the memory address for reading data is determined based on the current pixel position and filter size. This dynamic addressing allows a single line memory to serve multiple filtering operations sequentially, reducing the number of fixed memory units needed.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If larger filter sizes are used to improve image quality, then processing accuracy is improved, but memory capacity and circuit size increase

Engineering Contradiction:
Improveimage qualityVSAvoidmemory capacity
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent reads more data than strictly necessary for the current filter operation into the segment memory, preparing data for future operations. This partial over-fetching reduces the need for multiple specialized memory units by anticipating future data needs, thereby reducing overall memory capacity requirements.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent pre-loads data into segment memory before it is actually needed for filtering operations. By reading data ahead of time and storing it in segment memory, the system avoids the need for multiple line memories to simultaneously hold data for different filtering stages.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If data is read and processed in block-by-block fashion, then data processing efficiency is improved, but circuit complexity for address calculation increases

Engineering Contradiction:
Improvedata processing efficiencyVSAvoidaddress calculation circuit
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses different addressing strategies for different segments of the image data. Each segment memory has a dedicated address range, and the address calculation is simplified for each local segment rather than requiring complex global address calculation for the entire image line.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7933465B2Processing data supply method and image processing apparatus
Publication Date: 2011.04.26 RENESAS ELECTRONICS CORP
  • US7933465B2 patent drawing
  • US7933465B2 patent drawing
  • US7933465B2 patent drawing

AI summary

When performing arithmetic processing on unprocessed image data with use of a target pixel and reference pixels in its proximity, buffers of a number corresponding to the number of lines required for the arithmetic processing, which are a first buffer and a second buffer, are used as intermediate storage units. Each buffer has a capacity that is smaller than a size of a line of the unprocessed image data and equal to or larger than a size required for the arithmetic processing in a main scanning direction. In each arithmetic processing, a pixel from each line in the unprocessed image data is input one by one to a storage region at the right end of a corresponding buffer, and a pixel is read and output from each position of each buffer that is determined according to a positional relationship between a target pixel and its reference pixel. Each time arithmetic processing is performed in each line, data is shifted one pixel from the right end to the left end in the first buffer and the second buffer.