Segmented Chip-to-Heat-Sink Bonding for Thermal Stress Relief
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Solution Overview
Problem
Electronic components with silicon chips on copper heat sinks face reliability issues due to differing thermal expansion coefficients, leading to thermomechanical stresses, and existing solutions like elastic adhesives compromise thermal conductivity.
Innovation Solution
The electronic component features a segmented connecting surface between the silicon chip and heat sink, allowing thermomechanical stress reduction without the need for elastic adhesives, using thermally conductive solder material and segmented heat sinks or chips to manage stress effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an elastic adhesive is used to secure the silicon chip on the copper heat sink, then thermomechanical stress is reduced, but thermal conductivity is reduced
Solution Approach 1:
The connecting surface between the silicon chip and copper heat sink is segmented into multiple connecting surface segments spaced apart from one another. This segmentation allows the continuous stress distribution to be interrupted, reducing thermomechanical stress without requiring elastic adhesives that would compromise thermal conductivity. The spaced-apart segments create stress relief zones while maintaining thermal contact pathways.
2Loss of energy
If silicon chip and copper heat sink are directly connected, then thermal conductivity is maximized, but thermomechanical stress increases due to different coefficients of thermal expansion
Solution Approach 1:
The connecting surface is divided into multiple discrete segments spaced apart from one another. This segmentation strategy maintains direct thermal contact between the silicon chip and copper heat sink (preserving thermal conductivity) while creating stress relief zones that prevent continuous stress accumulation (improving thermomechanical stress resistance).
Solution Approach 2:
The connecting surface exhibits non-uniform distribution of contact regions. By spacing the connecting surface segments apart rather than providing continuous contact, the design creates localized stress concentration points that are separated by stress-free zones, optimizing both thermal transfer and stress management at different locations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and thermal conductivity of the electronic component, enabling increased output power by isolating stress to specific connecting surface regions and maintaining efficient heat dissipation.
Implementation Method 1
The electronic semiconductor chip and the heat sink may comprise different coefficients of thermal expansion. This causes a thermomechanical stress in the electronic component. By virtue of the fact that the connecting surface between the underside of the electronic semiconductor chip and the top side of the heat sink is segmented into connecting surface segments spaced apart from one another, the thermomechanical stress is reduced
Implementation Method 2
A connecting surface formed between the underside of the electronic semiconductor chip and the top side of the heat sink is segmented into connecting surface segments. The electronic semiconductor chip is secured by an underside on a top side of the heat sink and is thermally connected to the heat sink
Data Source
AI summary
An electronic component has an electronic semiconductor chip and a heat sink which is provided for dissipating heat generated during the operation of the electronic semiconductor chip. A lower face of the electronic semiconductor chip is secured to an upper face of the heat sink and is thermally connected to the heat sink. A connecting surface which is formed between the lower face of the electronic semiconductor chip and the upper face of the heat sink is segmented into connecting surface segments, wherein adjacent connecting surface segments are mutually spaced on a plane which is parallel to the lower face of the electronic semiconductor chip.