Time Synchronization Using Segmented Clock Deviation Corrections
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Solution Overview
Problem
Current Precision Time Protocol (PTP)-based time synchronization methods face challenges in achieving high accuracy due to clock deviations between master and slave devices, leading to time offsets that hinder precise synchronization, especially in applications requiring sub-microsecond precision.
Innovation Solution
A time synchronization process that calculates clock deviations between master and slave devices, divides the differences, and incorporates these corrections into the slave device's time information to minimize time offsets, enabling highly accurate synchronization by frequent and divided corrections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If PTP-based time synchronization is performed using conventional methods, then time synchronization is achieved between master and slave devices, but clock deviations cause time offsets that prevent high accuracy synchronization
Solution Approach 1:
The patent segments the time synchronization process into multiple measurement cycles, where clock deviations are calculated and corrected in discrete steps rather than as a single operation. This allows for incremental refinement of synchronization accuracy while maintaining system reliability.
Solution Approach 2:
The patent implements a feedback mechanism where the calculated clock deviation is used to generate correction values that are applied to the slave device's time information. This closed-loop approach continuously reduces time offsets and improves synchronization accuracy over multiple correction cycles.
2Measurement precision
If clock deviation corrections are applied frequently to improve synchronization accuracy, then time offset is reduced, but system complexity increases
Solution Approach 1:
The patent performs preliminary calculations of clock deviation and correction values in advance, storing them for later application. This preparation work reduces the complexity of real-time synchronization operations while maintaining high accuracy through pre-computed correction factors.
Solution Approach 2:
The patent applies corrections periodically at scheduled intervals rather than continuously, which reduces computational overhead and system complexity while maintaining synchronization accuracy within acceptable bounds between correction cycles.
3Measurement precision
If divided corrections are incorporated into slave device time information, then time offset is minimized achieving ±1 μs accuracy, but processing overhead increases
Solution Approach 1:
The patent divides the total correction amount into multiple smaller correction steps that are applied sequentially to the slave device's time information. This segmentation achieves high precision (±1 μs) by incrementally reducing time offsets while distributing processing load across multiple operations.
Solution Approach 2:
The patent applies partial corrections in each cycle rather than waiting for complete measurement cycles, performing sufficient correction action to maintain accuracy while avoiding excessive processing. This balances precision requirements with processing efficiency.
Data Source
AI summary
A non-transitory computer-readable recording medium storing a program that causes a computer to execute a time synchronization process between a master device and a slave device, the process includes calculating a clock deviation between the master device and the slave device based on a plurality of pieces of time information in each of the master device and the slave device, dividing a difference in the clock deviation, and incorporating each of the divided differences into the time information of the slave device to correct the clock deviation.