Segmented Communication Bar Layout for Reconfigurable Logic Chips

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Solution Overview

Problem

Current logic chip designs face challenges in efficiently interconnecting complex logic circuits and providing flexible configuration, particularly in re-configurable on-chip buses for field programmable gate arrays (FPGAs), as existing approaches like circuit switching and packet switching suffer from limitations such as high overhead, coarse-grained placement, and inability to handle modules of varying sizes efficiently.

Innovation Solution

A logic chip with individually addressable resource blocks and a communication bar that extends across these blocks, featuring bypass and access segments, allowing for flexible configuration and routing of signals, enabling efficient communication and reconfiguration of logic circuits by matching input and output interfaces across resource blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If circuit switching techniques are used for on-chip communication, then data transfer between hardware modules is enabled, but the system suffers from high overhead and coarse-grained placement limitations

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidoverhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The communication bar is divided into multiple segments, each associated with a resource block. This segmentation allows fine-grained control of communication paths through individual resource blocks, enabling precise routing without the overhead of traditional circuit switching while maintaining reliable data transfer between modules.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The communication bar segments can be dynamically configured to bypass or access resource blocks based on runtime requirements. This dynamic reconfiguration capability allows the system to adapt communication paths flexibly, reducing overhead by activating only the necessary segments while maintaining robust data transfer functionality.

Inventive Principle:
Principle #15Dynamics

2Reliability

If traditional on-chip bus approaches are used, then communication between modules is established, but the system cannot efficiently handle modules of varying sizes

Engineering Contradiction:
Improvecommunication capabilityVSAvoidmodule size flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

By segmenting the communication bar into multiple independently controllable segments, each resource block can be individually accessed or bypassed. This allows modules of varying sizes to be efficiently accommodated by activating only the necessary communication segments, providing both reliable communication and adaptability to different module configurations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different segments of the communication bar can be configured with different access characteristics tailored to the specific requirements of each resource block. This local customization enables efficient handling of modules with varying sizes and communication needs while maintaining overall system reliability.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If fixed interface locations are used in resource blocks, then routing simplicity is maintained, but flexibility in signal routing is reduced

Engineering Contradiction:
Improverouting simplicityVSAvoidsignal routing flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The communication bar segments provide dynamic routing capability while maintaining fixed interface locations. Segments can be configured to bypass or access resource blocks based on runtime requirements, achieving routing flexibility without compromising the simplicity of fixed interface locations. This dynamic configuration allows signals to be routed flexibly through different paths while the physical interface locations remain fixed and simple to manufacture.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8018249B2Logic chip, logic system and method for designing a logic chip
Publication Date: 2011.09.13 KOCH DIRK DR
  • US8018249B2 patent drawing
  • US8018249B2 patent drawing
  • US8018249B2 patent drawing

AI summary

A logic chip has a plurality of individually addressable resource blocks each of the resource blocks having logic circuitry, and a communication bar extending across a plurality of the individually addressable resource blocks. The communication bar has a plurality of communication bar segments associated with the resource slots. The communication bar segments of the individually addressable resource blocks have identical interface locations with respect to boundaries of the resource blocks, such that an input interface location of a first resource block matches an output interface location of an adjacent second resource block. At least one of the individually addressable resource blocks has a bypass segment of the communication bar. At least one of the individually addressable resource blocks has an access segment of the communication bar. The access segment has an access structure inserted between a first communication bar interface location and a second communication bar interface location, to allow for a read access or a write access or a combined read/write access to the communication bar.