Segmented Contact Field Plates for High-Voltage Idlin Control

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Solution Overview

Problem

The challenge in semiconductor manufacturing is the degradation of linear drain current (Idlin) in high voltage transistor devices due to contact field plate structures, which affects efficiency, particularly in applications like buck converters.

Innovation Solution

The implementation of additional contact field plate electrodes that are either electrically isolated from the source electrode or organized into independent sets, allowing for independent voltage or grounding, thereby reducing Idlin degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If contact field plate structures are used in high voltage transistor devices, then the devices can achieve high voltage operation capability, but linear drain current (Idlin) degradation occurs which reduces efficiency

Engineering Contradiction:
Improvehigh voltage operation capabilityVSAvoidlinear drain current degradation
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The field plate structure is divided into multiple segments with different electrical connections. Some field plate contacts are connected to the source electrode while others are left floating or connected to different potentials, creating segmented regions that independently manage electric field distribution and reduce Idlin degradation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the field plate are assigned different electrical characteristics. By creating local variations in field plate potential and connectivity, the invention optimizes electric field distribution in specific areas to simultaneously achieve high voltage capability and minimize current degradation

Inventive Principle:
Principle #3Local quality

2Loss of energy

If additional contact field plate electrodes are added to reduce Idlin degradation, then device efficiency improves, but device complexity increases

Engineering Contradiction:
Improvelinear drain current degradationVSAvoidfield plate structure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The additional field plate electrodes serve multiple functions simultaneously: they maintain high voltage operation capability, reduce Idlin degradation, and can be integrated with existing device structures. The same field plate contacts provide both electric field control and degradation mitigation without requiring completely separate structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the efficiency of high voltage transistor devices by minimizing Idlin degradation, improving performance and reliability.

Implementation Method 1

each of the CFP contacts are configured to manipulate electric fields generated by the gate structure

Methodology Applied
Scientific EffectElectric field manipulation: Electric Field

Data Source

PatentUS20250344438A1Semiconductor devices having contact field plates and methods for forming the same
Publication Date: 2025.11.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250344438A1 patent drawing
  • US20250344438A1 patent drawing
  • US20250344438A1 patent drawing

AI summary

Semiconductor devices and methods for forming the same are provided. The methods include providing a substrate having source and drain structures separated by body and drift regions, a gate structure between the source and drain structures, an ILD layer over the source, drain, and gate structures, and a source contact coupled to the source structure. The methods include forming a first row of contact field plate (CFP) contacts in the ILD layer between the gate and drain structures, and forming a BEOL structure that is disposed on the ILD layer that includes a conductive metal layer coupled to the first row of CFP contacts and/or to the source structure. The method includes forming at least a second row of CFP contacts in the ILD layer between the gate structure and the drain structure, and/or electrically isolating the CFP contacts from the source structure.