Segmented CoWoS Interposer Layout to Reduce Warpage Stress

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Solution Overview

Problem

The semiconductor industry faces challenges in packaging semiconductor dies due to warpage and stress issues in large interposers, which can lead to cracking or delamination when bonding to substrates, especially as integration density increases.

Innovation Solution

The use of multiple smaller interposers instead of a single large one, with dies bonded to both interposers and embedded in molding material, reduces warpage and stress, allowing for easier bonding and reduced risk of delamination by maintaining smaller interposer sizes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a single large interposer is used to bond multiple semiconductor dies, then integration density is improved, but warpage and stress increase leading to cracking or delamination

Engineering Contradiction:
Improveintegration densityVSAvoidrisk of cracking or delamination
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides a single large interposer into multiple smaller interposers (first interposer, second interposer, third interposer, etc.). Each interposer bonds a subset of semiconductor dies. This segmentation reduces the size of each interposer, thereby minimizing warpage and stress while maintaining high integration density through the stacked configuration of multiple interposers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-plane interposer layout to a three-dimensional stacked configuration. Multiple interposers are arranged in different planes and stacked vertically, with lower interposers supporting upper interposers. This dimensional change allows high integration density without requiring a single large interposer, thus avoiding warpage and stress issues.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If a single large interposer is used, then component density is improved, but manufacturing complexity increases due to warpage control difficulties

Engineering Contradiction:
Improvecomponent densityVSAvoidwarpage control complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the interposer structure into multiple smaller interposers arranged in a stack. Each interposer is smaller in size, making it easier to manufacture and control for warpage. The segmentation approach simplifies the manufacturing process by reducing the complexity associated with handling and bonding large interposers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a vertical stacking arrangement of multiple interposers in different planes. This three-dimensional configuration allows component density to be increased without requiring larger interposers, thereby avoiding the warpage control complexities that arise with large single-plane interposer designs.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If multiple smaller interposers are used, then warpage and stress are reduced, but device structure complexity increases

Engineering Contradiction:
Improveminimized warpage and stressVSAvoidinterposer stacking structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes vertical stacking of multiple interposers in different planes to achieve high integration density. While this creates a three-dimensional structure, the modular nature of the stacked interposers actually simplifies the overall design compared to a single large interposer, as each smaller interposer can be independently manufactured and bonded with reduced warpage concerns.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested configuration where upper interposers are positioned on and supported by lower interposers in a stacked arrangement. This nesting approach organizes multiple interposers in a compact vertical structure, managing the complexity through hierarchical arrangement rather than horizontal expansion.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Ease of manufacture

If multiple smaller interposers are used, then bonding ease is improved, but manufacturing steps increase

Engineering Contradiction:
Improvebonding easeVSAvoidnumber of manufacturing steps
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent divides the interposer system into multiple smaller, manageable units that can be independently processed and bonded. Each smaller interposer requires less precise alignment and bonding effort compared to a single large interposer, improving ease of manufacture despite the increased number of components.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11967546B2Giga interposer integration through Chip-On-Wafer-On-Substrate
Publication Date: 2024.04.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11967546B2 patent drawing
  • US11967546B2 patent drawing
  • US11967546B2 patent drawing

AI summary

A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.