Segmented Crossbar Array Current Mirrors for Signal Amplitude Control

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Solution Overview

Problem

Crossbar memories face issues with high aggregate signal amplitude leading to voltage drops and electromigration, making it difficult to sense individual input devices due to overwhelming current, which can damage the array and require high dynamic range peripheral circuitry.

Innovation Solution

The implementation of segmented crossbar arrays with current mirrors that scale down aggregate currents and time-gating to control the flow of current, allowing for reduced charge integration and preventing overloading, using first and second stage current mirrors with selectable scaling factors and periodic enablement of current mirrors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If high current levels are maintained in the memory array, then signal strength is improved, but voltage drops and electromigration occur

Engineering Contradiction:
Improvesignal strengthVSAvoidarray damage
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The memory array is divided into multiple segments, each with its own current mirror circuit. This segmentation allows the total current to be distributed across multiple parallel paths, maintaining signal strength while reducing the current density and associated voltage drops and electromigration in any single segment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Current mirror circuits are introduced as intermediary elements between the memory array and the readout circuitry. These current mirrors act as buffer stages that can scale current levels, allowing high current operation in the array while providing protected, scaled-down signals to the peripheral circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If aggregate current is increased, then signal amplitude is improved, but voltage drops increase

Engineering Contradiction:
Improvesignal amplitudeVSAvoidvoltage drops
Core Design Contradiction:
PowerVSStress or pressure

Solution Approach 1:

The array is segmented into multiple independent sections, each contributing to the total signal amplitude. By distributing the aggregate current across multiple segments with individual current mirrors, the signal amplitude is maintained through parallel summation while the voltage drop in each segment remains manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The current mirror circuits provide adjustable scaling factors that can be tuned to optimize the balance between signal amplitude and voltage drops. By changing the mirror ratios, the system can adapt to different operating conditions and maintain optimal performance.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If high dynamic range peripheral circuitry is used, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveindividual device sensingVSAvoidperipheral circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Current mirror circuits serve as intermediary stages that perform the difficult task of isolating and scaling individual device currents before they reach the peripheral circuitry. This mediation allows standard peripheral circuits to achieve high measurement precision without requiring specialized high dynamic range design.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the need for complex high dynamic range peripheral circuitry with a more straightforward current mirror-based approach. Instead of relying on sophisticated readout circuits, the system uses current replication and scaling mechanisms that are simpler to implement and more robust.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Productivity

If current mirrors are continuously enabled, then signal reading is improved, but charge integration increases leading to overload

Engineering Contradiction:
Improvereading speedVSAvoidcharge integration
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The current mirrors are enabled periodically rather than continuously, synchronized with the input signal periods. This periodic operation allows the system to read signals efficiently while providing time for charge to discharge between measurement cycles, preventing accumulation and overload in the integration nodes.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

While the current mirrors operate periodically, the system maintains continuous functionality by rapidly switching between segments and using the parallel architecture to ensure that useful reading action continues without interruption, even as individual mirrors are switched on and off to control charge integration.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces aggregate current, preventing voltage drops and electromigration, enabling the reading of single device outputs while maintaining high current levels in the memory array, thus enhancing the reliability and functionality of crossbar memories.

Implementation Method 1

First stage current mirrors are electrically coupled to a subset of the resistive elements through a local current accumulation wire. A second stage current mirror is electrically coupled to the first stage current mirrors through a global accumulation wire.

Methodology Applied
Scientific EffectCurrent mirror: Electromagnetic Induction

Data Source

PatentUS10692573B2Controlling aggregate signal amplitude from device arrays by segmentation and time-gating
Publication Date: 2020.06.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10692573B2 patent drawing
  • US10692573B2 patent drawing
  • US10692573B2 patent drawing

AI summary

High dynamic range resistive arrays are provided. An array of resistive elements provides a vector of current outputs equal to the analog vector-matrix product between (i) a vector of voltage inputs to the array encoding a vector of analog input values and (ii) a matrix of analog resistive weights within the array. First stage current mirrors are electrically coupled to a subset of the resistive elements through a local current accumulation wire. A second stage current mirror is electrically coupled to the first stage current mirrors through a global accumulation wire. Each of the first stage current mirrors includes at least one component having respective scaling factors selectable to scale up or down the current in the local current accumulation wire, thus controlling the aggregate current on the global accumulation wire.