Segmented Resistor-String DAC Bootstrap Control for Stable Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional segmented resistor string type digital to analog converters face challenges in maintaining stability due to the influence of LSB resistor strings on MSB resistor strings, requiring additional circuits for current compensation and suffering from linearity issues, especially when power supply voltage varies, and are prone to performance degradation at low temperatures.
Innovation Solution
A control system is introduced that divides the MSB resistor string into three groups, using a decoding circuit, logic sequential generation circuit, and control signal bootstrap circuit to generate complementary control signals that boost the power supply voltage and threshold voltage, controlling the first switch group to manage the intermediate level resistor string, ensuring continuity and reducing on-resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current compensation or isolation circuits are added to reduce LSB influence on MSB, then linearity improves, but device complexity increases
Solution Approach 1:
The patent extracts and eliminates the problematic interaction between LSB and MSB resistor strings by reconfiguring the resistor string architecture. The resistor string is divided into segments with dedicated switches that independently control each segment, removing the need for complex compensation or isolation circuits while maintaining high linearity.
Solution Approach 2:
The resistor string is segmented into multiple independent sections, each controlled by its own switch. This segmentation allows independent control of voltage taps without mutual interference, achieving high linearity through simple switch-based control rather than complex compensation circuits.
2Manufacturing precision
If switch resistance is reduced to improve linearity, then differential nonlinearity improves, but switch area increases
Solution Approach 1:
The patent applies different switch configurations to different segments of the resistor string based on their specific requirements. Each switch is optimized for its local position in the resistor string, allowing minimal switch area while maintaining excellent linearity through localized optimization rather than uniform design.
Solution Approach 2:
The patent uses dynamic switching control where switches are activated sequentially rather than simultaneously. This dynamic approach reduces the required switch area by ensuring only one switch conducts at a time, minimizing the impact of switch resistance on linearity without requiring large switch dimensions.
3Reliability
If transistor width-to-length ratio is increased to reduce on-resistance at low temperature, then performance stability improves, but switch area and cost increase
Solution Approach 1:
The patent incorporates bootstrap circuits that pre-charge the gate of switches before they are activated. This preliminary action ensures that switches operate with optimal gate voltage even at low temperatures, maintaining low on-resistance and stable performance without requiring increased transistor width-to-length ratio and the associated area penalty.
Solution Approach 2:
The patent introduces bootstrap capacitors as intermediary elements that store and transfer charge to the switch gates. These capacitors act as mediators that maintain proper switch operation across temperature variations, enabling stable performance with compact switch dimensions by decoupling the switch physical size from its electrical performance.
Data Source
AI summary
A segmented resistor string type digital to analog converter comprises: a most significant bit (MSB) resistor string (104) comprising a high level resistor string, an intermediate level resistor string and a ground level resistor string; a decoding circuit (101), configured to decode an n-bit code of the MSB resistor string (104) and output 2n decoded codes; a logic sequential generation circuit (102), connected to the decoding circuit (101) and configured to perform a logic operation on a middle-position code among the 2n decoded codes and a refresh clock signal in non-overlapping sequences, and output two groups of control signals with completely complementary high level durations; a control signal bootstrap circuit (103), connected to the logic sequential generation circuit (102) and configured to perform bootstrap processing on the control signal, and increase the high level of the control signal to a sum of a power supply voltage and a threshold voltage; and a first switch group (106), connected to the control signal bootstrap circuit (103) and the intermediate level resistor string, where on/off of the first switch group (106) is controlled by the control signal after the bootstrap processing, so as to connect the intermediate level resistor string to the circuit or disconnect the intermediate level resistor string from the circuit.