Segmented DAC Current Timing for High Resolution in Less Area
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Solution Overview
Problem
As the number of bits processed by digital-to-analog converters (DACs) increases, the number of circuits required also increases, leading to a significant rise in circuit area, and existing solutions struggle to efficiently manage the turn-on time of current source circuits, affecting accuracy and layout design.
Innovation Solution
The proposed solution involves a digital-to-analog converter (DAC) device with a mechanism to control the turn-on time of current source circuits by processing digital data according to a system clock signal, determining a ratio between the turn-on time and the system clock signal, and using this ratio to set the analog signal, thereby reducing the layout area and improving current precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of bits processed by DAC increases, then the processing capability and resolution are improved, but the circuit area increases significantly
Solution Approach 1:
The patent divides the DAC circuit into multiple sub-DAC circuits, each handling a portion of the input bits. This segmentation allows the total resolution to be achieved through parallel operation of smaller circuits, reducing the area required compared to a single large-scale DAC circuit while maintaining high resolution capability.
Solution Approach 2:
The patent introduces a time dimension by controlling the turn-on timing of different current source circuits based on the system clock signal. By distributing the conversion process across different time intervals, the patent reduces the simultaneous circuit requirements, thereby reducing the overall circuit area while maintaining high-resolution conversion capability.
2Measurement precision
If the number of current source circuits is increased to process more bits, then the DAC resolution is improved, but the circuit complexity and area increase
Solution Approach 1:
The patent employs periodic switching of current source circuits synchronized with the system clock signal. Different current source circuits are activated in different clock cycles, allowing the DAC to process multiple bits without requiring all current sources to operate simultaneously. This periodic action reduces circuit complexity while maintaining high conversion accuracy.
Solution Approach 2:
The patent implements dynamic control of current source circuit activation based on the input digital signal and system clock. The turn-on timing of each current source is dynamically adjusted, allowing the circuit to adapt its complexity to the actual conversion requirements, thereby reducing overall circuit complexity while maintaining high precision.
3Measurement precision
If the turn-on time of current source circuits is extended to improve current precision, then the conversion accuracy is improved, but the signal distortion and harmonics increase
Solution Approach 1:
The patent uses periodic switching of current source circuits synchronized with the system clock signal. By activating different current sources in different clock cycles rather than extending the turn-on time of a single source, the patent achieves high current precision while avoiding the signal distortion and harmonics that would result from prolonged activation of individual current sources.
Solution Approach 2:
The patent divides the current conversion task among multiple current source circuits, each activated for a specific time interval. This segmentation allows each current source to operate for an optimized duration that achieves necessary precision without excessive turn-on time, thereby reducing signal distortion and harmonic generation while maintaining high current precision.
Data Source
AI summary
A digital-to-analog converter (DAC) device includes a DAC circuitry. The DAC circuitry includes a first DAC circuit and a second DAC circuit. The first DAC circuit is configured to generate a first signal according to a plurality of least significant bits of an input signal. The second DAC circuit is configured to output a second signal according to a plurality of most significant bits of the input signal. A first turn-on time of at least one current source circuit in the first DAC circuit is configured to set the first signal.